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Three-level inverter dead-time compensation algorithm based on modulated wave correction

A technology of three-level inverter and dead zone compensation, which is applied in the direction of electrical components, output power conversion devices, AC power input conversion to DC power output, etc., to reduce costs, ensure reliability and accuracy, and prevent voltage and current waveform distortion effects

Inactive Publication Date: 2013-01-16
HEFEI UNIV OF TECH
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  • Claims
  • Application Information

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Problems solved by technology

[0004] The problem to be solved in the present invention is to propose a three-level inverter dead zone compensation algorithm based on modulation wave correction for the defects of the current three-level converter dead zone compensation method

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  • Three-level inverter dead-time compensation algorithm based on modulated wave correction
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  • Three-level inverter dead-time compensation algorithm based on modulated wave correction

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Embodiment Construction

[0026] The following description combines the accompanying drawings for analysis:

[0027] Such as figure 1 As shown, the three-level inverter dead zone compensation algorithm based on modulation wave correction includes a three-level inverter, and the three-level inverter is a diode-clamped three-level inverter, and the diode clamp The bit-type three-level inverter includes three parallel-connected three-level bridge arms, and the specific algorithm includes the following steps:

[0028] (1) Judging whether the modulation wave is positive or negative, the direction of the bridge arm current, and the triangular carrier of a switching cycle is a rising edge or a falling edge;

[0029] (2) Adjust the modulation wave accordingly through the different states of the three influencing factors in step (1);

[0030] Assume that the direction of current flowing out of the three-level inverter is forward and reverse, and the dead time is T d , the switching frequency is f c , the mo...

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Abstract

The invention discloses a three-level inverter dead-time compensation algorithm based on modulated wave correction. A three-level inverter is involved in the algorithm, wherein the three-level inverter is a diode-clamped three-level inverter which comprises three parallelly connected three-level bridge arms. The algorithm comprises the following steps of: adjusting modulated wave correspondingly by determining the current direction of the bridge arms, judging whether the modulated wave is positive or negative and judging whether a triangular carrier wave is a rising edge or a falling edge in one switching period, comparing the modulated wave with the triangular wave to acquire a pulse width modulation (PWM) switching sequence, and adding dead time to acquire a switching tube driving signal subjected to dead-time compensation. By the algorithm, a dead-time effect can be accurately compensated in real time, the fifth harmonic and the seventh harmonic can be effectively reduced, voltage and current waveform distortion is avoided, an output waveform cannot be delayed, a special hardware detection device is not needed, cost is reduced, and the reliability and accuracy of a system can be ensured.

Description

technical field [0001] The invention relates to the field of dead zone compensation algorithms, in particular to a three-level inverter dead zone compensation algorithm based on modulation wave correction, which is especially suitable for photovoltaic grid-connected power generation and wind power generation based on the combination of power electronic conversion technology and computer control technology. Dead zone compensation of converters in energy conversion systems such as power generation. Background technique [0002] Power devices have switching delays. If a device in the same bridge arm needs to be turned off but is not turned off, and the complementary device is turned on, it will cause a shoot-through and burn out the device. In order to prevent the inverter from passing through, it is necessary to add a dead zone to the complementary trigger signal. During the dead time, the expected leading or trailing edge of the PWM pulse will superimpose or reduce the width...

Claims

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Application Information

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IPC IPC(8): H02M7/487H02M1/088
CPCH02M7/487H02M1/385
Inventor 王付胜张兴张卫义李飞刘淳刘芳
Owner HEFEI UNIV OF TECH
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