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Image transmission and processing system based on FPGA (Field Programmable Gate Array) and multi-core DSP (Digital Signal Processor)

A technology of processing system and data transmission system, applied in the field of image transmission and processing system based on FPGA and multi-core DSP, can solve the problem of no application, etc., and achieve the effect of improving computing speed and processing performance

Active Publication Date: 2013-02-27
HUAZHONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, according to the existing papers and patents, the architecture based on FPGA and multi-core DSP has not been applied to the field of image processing at this stage

Method used

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  • Image transmission and processing system based on FPGA (Field Programmable Gate Array) and multi-core DSP (Digital Signal Processor)
  • Image transmission and processing system based on FPGA (Field Programmable Gate Array) and multi-core DSP (Digital Signal Processor)
  • Image transmission and processing system based on FPGA (Field Programmable Gate Array) and multi-core DSP (Digital Signal Processor)

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[0026] 1. After the system is powered on, the FPGA (model EP2C35F672C6N) partly initializes and then starts to read the image data buffered into the internal FIFO through the PCI bridge. Here, choose PCI9056 as the PCI bridge to connect PC and FPGA. The interface between PCI9056 and FPGA can be realized by connecting the signals (data, address, control, etc.) of the local end of PCI9056 with the pins of FPGA.

[0027] 2. The FPGA writes the data in the FIFO to the DDR2 SDRAM (model MT47H16M16) connected to it. FPGA's DDR2SDRAM interface such as figure 2 shown.

[0028] 3. After the data in DDR2SDRAM reaches a certain amount, FPGA notifies CPLD to exchange the bus control right of dual-channel DDR2SDRAM between FPGA and DSP (model TMS320C6472), and sends an interrupt signal to DSP. Here, what needs to be explained is: TMS320C6472 itself is not directly connected with DDR2SDRAM, but needs to be connected with one of the DDR2SDRAMs through switching of CPLD. When the DDR2SDR...

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Abstract

The invention discloses an image transmission and processing system based on an FPGA (Field Programmable Gate Array) and a multi-core DSP (Digital Signal Processor). The system comprises a PC (Personal Computer), a PCI (Peripheral Component Interconnect) bridge, a double channel selector switch, the FPGA, the multi-core DSP, a crystal oscillator, a power supply and two memories. The PC is connected with the FPGA through the PCI bridge, the FPGA is connected with the double channel selector switch, the double channel selector switch is connected with the two memories and the DSP, the DSP is connected with the FPGA through an HPI (Hardware Platform Interface) interface, and the power supply is respectively connected with the FPGA and the DSP. The PC transmits image data to the FPGA through the PCI bridge. The FPGA carries out FIFO (First In, First Out) cache for the image data. Continuous image data is alternately stored between the two memories and transmitted to the multi-core DSP to process in turn in a ping-pong manner, so that the efficient and highly stable data transmission can be obtained.

Description

technical field [0001] The invention belongs to the technical field of image transmission and processing, in particular to an image transmission and processing system based on FPGA and multi-core DSP. Background technique [0002] With the development of science and technology, people's living standards are constantly improving. The advent of the digital information age has brought about an "information explosion" in the human world, which has greatly increased the amount of data. At the same time, in video detection, medical imaging, etc. field, increasingly complex two-dimensional, three-dimensional and even four-dimensional image processing requires a parallel system capable of running complex algorithms, especially in the field of video image processing, which usually needs to complete signal processing and analysis in a very short time. The performance requirements of all aspects of the system are very high. [0003] Compared with single-core DSP, FPGA (Field Programma...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/24
Inventor 张旭明郭富民姚龙龙李柳丁明跃熊有伦尹周平王瑜辉
Owner HUAZHONG UNIV OF SCI & TECH