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On-chip memory debugging method and device based on memory built-in self-test

An on-chip memory, built-in self-test technology, applied in static memory, instruments, etc., can solve the problem of not being able to collect on-chip memory array read data, etc., to reduce debugging time, debug access logic is simple and efficient, and increase the success rate. Effect

Inactive Publication Date: 2013-03-13
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It can be seen that the memory built-in self-test controller of the prior art has included all signals for the read and write control of the on-chip memory array, but cannot collect the read data of the on-chip memory array.

Method used

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  • On-chip memory debugging method and device based on memory built-in self-test

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Embodiment Construction

[0029] like figure 2 As shown, the implementation steps of the on-chip memory debugging method based on memory built-in self-test in this embodiment are as follows:

[0030] 1) Enter the debug control command to start memory debugging, the debug control command includes the number of the target on-chip memory to be debugged and the read area to be debugged;

[0031] 2) Decode the number of the debugging control command, and select the target on-chip memory according to the decoding signal;

[0032] 3) Under the control of the memory built-in self-test controller, access the selected target on-chip memory according to the read area to be debugged in the debug control instruction;

[0033] 4) Cache the read data of the target on-chip memory into the debug data register, and output the data of the debug data register as the debug result data of the debug control instruction.

[0034]The memory built-in self-test circuit already has the control function of reading and writing t...

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Abstract

The invention discloses an on-chip memory debugging method and a device based on memory built-in self-test. The method comprises the following steps: 1) inputting a debugging control instruction, and starting memory debugging; 2) decoding the debugging control instruction, and selecting a target on-chip memory according to a decoding signal; 3) accessing the selected target on-chip memory according to a to-be-debugged reading area of the debugging control instruction under the control of a memory built-in self-test controller; and 4) caching the reading data of the target on-chip memory to a debugging data register, and taking the data of the debugging data register as debugging result data output of the debugging control instruction. The device comprises a memory built-in self-test controller, a debugging control register, a decoder, an input selector, an output selector and a debugging data register. The memory debugging data can be accessed on the basis of the memory built-in self-test, and the on-chip memory debugging method has the advantages of low hardware overhead, low area overhead and high cost performance.

Description

technical field [0001] The invention relates to an on-chip memory debugging method in an integrated circuit chip, in particular to an on-chip memory debugging method and device based on memory built-in self-test (MBIST). Background technique [0002] With the continuous improvement of VLSI process technology and the advancement of design methods, the scale of integrated circuit chips has become larger and larger, and the possibility of chip failures after tape-out is getting higher and higher. In order to successfully mass-produce the chip, it is necessary to carry out sufficient debugging after the chip is taped out, and when a fault is found, obtain the internal state information of the chip as much as possible, analyze the cause and location of the fault, and correct the fault. The internal state information of the chip is mainly stored in registers or memory, and the contents of the registers can be easily debugged and accessed by scanning, but the contents of the memory...

Claims

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Application Information

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IPC IPC(8): G11C29/12
Inventor 王永文孙彩霞高军倪晓强张承义隋兵才陈微窦强赵天磊王蕾黄立波
Owner NAT UNIV OF DEFENSE TECH
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