Method for starting field programmable gate array (FPGA)/digital signal processor (DSP) embedded system

An embedded system and embedded technology, applied in the direction of program loading/starting, program control devices, etc., can solve the problems of increasing the complexity of PCB wiring and system volume, and achieve the effect of superior performance and reduced complexity.

Active Publication Date: 2013-03-27
BEIJING RES INST OF TELEMETRY +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The data lines and address lines of parallel FLASH chips will occupy more PCB layout and routing resources, thus increasing the complexity of PCB wiring and system volume

Method used

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  • Method for starting field programmable gate array (FPGA)/digital signal processor (DSP) embedded system
  • Method for starting field programmable gate array (FPGA)/digital signal processor (DSP) embedded system
  • Method for starting field programmable gate array (FPGA)/digital signal processor (DSP) embedded system

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Embodiment Construction

[0022] Specific embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0023] figure 1 It is the hardware structure that the present invention adopts. FPGA / DSP embedded system comprises FPGA chip, DSP chip and EPCS chip, and this method invention selects the cycloneIII series FPGA chip of ALTERA Company, and this series FPGA supports remote configuration technology. Choose the C67XX series DSP chip of TI Company, this series of DSP chip supports the SPI starting mode from the mode. FPGA special configuration chip chooses EPCS16, which is used to store FPGA hardware configuration data and DSP application program data, which has a storage space of 16Mbit.

[0024] Such as image 3 As shown, the present invention provides a kind of startup method of the embedded system of FPGA / DSP structure, and FPGA / DSP embedded system comprises FPGA chip, DSP chip and EPCS chip, is preset with DSP application data and u...

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Abstract

The invention discloses a method for starting a field programmable gate array (FPGA) / digital signal processor (DSP) embedded system. According to the method, the reconfiguration of the FPGA and a starting process of a DSP are controlled and finished through an embedded soft-core processor NIOS II based on an active serial configuration chip EPCS special for the FPGA. Compared with a starting method based on an external parallel FLASH chip, the method has the advantages that the board level printed circuit board (PCB) routing complexity of the FPGA / DSP and the system size are reduced.

Description

technical field [0001] The invention relates to a method for starting an embedded system of FPGA / DSP architecture, and belongs to the field of software and hardware design of embedded systems of FPGA / DSP architecture. Background technique [0002] As a typical embedded system, the embedded system of FPGA / DSP structure has strong logic control ability and computing ability, and it is used in many occasions such as military affairs, medical treatment, and industry. Usually, FPGA is used as the system control core to control the collection and processing of peripheral data and implement various communication protocols. DSP is the computing core of the system and is responsible for implementing the core algorithm of the system. It transmits data through EMIF and FPGA. However, as intelligent processing devices, FPGA and DSP cannot store application programs themselves, so the embedded system of this architecture needs an external memory chip to store FPGA hardware configuration ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445
Inventor 阙兴涛王磊刘海涛汪守利王松董帅
Owner BEIJING RES INST OF TELEMETRY
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