Manufacturing method for memory

Abstract

The invention discloses a manufacturing method for a memory. The manufacturing method for the memory comprises the following steps of providing a semiconductor substrate, and forming an oxide layer, a floating gate layer, an oxide-nitride-oxide (ONO) layer, a control gate structure, a cap oxide layer and a bottom anti-reflection coating in sequence on the semiconductor substrate, wherein the interior of the floating gate layer is provided with an isolation groove; performing first etching and second etching, etching the control gate layer, and reserving the part of the control gate layer, which is located in the isolation groove, is included in the second etching process; performing third etching and fourth etching; and removing residual photoresist, the residual bottom anti-reflection coating and the residual cap oxide layer. According to the manufacturing method for the memory, the etching process is performed for four times, and the thickness of the part of the control gate layer, which is located in the isolation groove, is kept during the second etching process, and the reserved part is used as an etching barrier during the subsequent etching process, and therefore, a silicon material in the semiconductor substrate below the isolation groove is protected, the damage to the semiconductor is reduced, and the performance of a memory device is improved.

Description

technical field [0001] The invention relates to an integrated circuit manufacturing method, in particular to a memory manufacturing method. Background technique [0002] Memory is used to store a large amount of digital information. According to recent surveys, memory chips account for about 30% of semiconductor transactions worldwide. Over the years, progress in process technology and market demand have led to more and more high-density various types of memory. Such as RAM (random access memory), DRAM (dynamic random access memory), ROM (read-only memory), EPROM (erasable programmable read-only memory), FLASH (flash memory) and FRAM (ferroelectric memory), among them, flash memory Memory (FLASH) has become the mainstream of non-volatile semiconductor storage technology and is widely used in electronic products such as smart cards, SIM cards, microcontrollers, and mobile phones. [0003] Please refer to Figure 1 to Figure 5 As shown in FIG. 1 , it is a structural schematic...

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Problems solved by technology

[0007] Then, continue to etch the ONO layer 16. Since the etching process is difficult to accurately control the etching end point, over-etch phenomenon (Over-Etch) usually occurs, That is, the partial thickness of the floating gate layer 14 below the ONO layer 16 and the oxide layer 12 in the isolation groove 300 will be further etched, and even the semiconductor substrate 10 will be etched, such as Figure 4, causing damage to the semiconductor substrate 10;

[0008] such as As shown in Figure 5, in the process of etching the floating gate layer 14 to form the floating gate layer, the semiconductor substrate 10 will also be etched, thereby further damaging the semiconductor substrate 10, resulting in the formation of a deeper recess 40, In this way, the ion implantation region of the source / drain will be etched away, which will increase the series resistance of the source / drain terminal, reduce the performance of the source / drain, and increase the difficulty of filling the subsequent interlayer dielectric layer, thus affect memory performance

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