Catching diode and manufacture method thereof

Abstract

The invention discloses a catching diode. An N type buried layer is arranged on a P type epitaxy in a growing mode. A high voltage P type trap is formed on the N type buried layer. A heavy doping N type lead layer which is communicated with the N type buried layer is formed on two sides of the high voltage P type trap. A P type trap is formed in the middle of the upper portion of the high voltage P type trap. N type traps are respectively formed at the positions, adjoining with two sides of the P type trap, of the upper portion of the high voltage P type trap. A P type heavy doping region is formed on the middle portion of the P type trap and serves as a positive electrode active contact region. An N type heavy doping region is formed on the middle portion of each N type trap and serves as a negative electrode active contact region. P type heavily doping regions are respectively formed on high voltage P type traps on the outer sides of the N type traps and serve as P type isolating ring active contact regions. Further disclosed is a manufacturing method of the catching diode. According to the catching diode and the manufacturing method of the catching diode, a self-isolating function of the catching diode can be achieved, namely when a device works in a positive conductive region, a large drive current can be supplied so as to achieve a positive voltage reduction function, and the current is not essentially injected into a substrate.

Description

technical field [0001] The present application relates to semiconductor technology, in particular to a clamping diode and a manufacturing method thereof. Background technique [0002] Clamping diodes are widely used in integrated circuits to play the role of clamping voltage, such as devices in ESD (Electro-Static discharge, electrostatic discharge) protection circuits and the like. Usually, these circuits have high requirements on the accuracy of the clamping voltage of the clamping diode, and have high requirements on the in-plane distribution of the clamping voltage, device time dependence, temperature dependence, leakage and other indicators. [0003] The longitudinal interface of common clamping diodes such as figure 1 As shown, its structure is to generate an N-type well region on a P-type silicon substrate, an active region and an isolation field region (usually a shallow trench insulation region, STI) are formed on the N-type well region, and the N-type well region ...

AI Technical Summary

Problems solved by technology

[0006] Due to the characteristics of the diode, the clamping diode can only work in the reverse breakdown region. When an abnormal condition occurs in a certain part of the circuit, the clamping diode is in the forward open state, and the device will inject a large amount of current into the substrate. , a large amount of current injected into the substrate will have a huge impact on the working status of other devices in the entire chip, and even cause the chip to burn

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