Method for forming metal silicide gate

Abstract

The invention discloses a forming method of a metal silicide gate. The forming method includes that a gate medium layer, gate polycrystalline silicon, a buffer layer or a buffer layer and a blocking layer, and a metal silicide layer are sequentially formed on a silicon substrate; the gate medium layer, the gate polycrystalline silicon, the buffer layer or the buffer layer and the blocking layer, and the metal silicide layer are sequentially respectively etched through a photoetching process to form the metal silicide gate; the buffer layer is etched through alkaline etching solutions and a groove shape is formed; a first oxide layer is formed through an oxidation process; and the first oxide layer is etched to form an oxide layer side wall. By adopting the forming method, the problem of buffer layer protruding caused by buffer layer oxidization during polycrystalline silicon side wall oxide layer forming can be solved, the key dimension of subsequently formed gate side walls can be accurately controlled, and accordingly gate side wall quality can be improved and electric leakage between a source electrode and a drain electrode can be avoided.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a method for forming a metal silicide gate. Background technique [0002] Surface channel (surface channel) devices have lower leakage currents than buried channel (buried channel) devices. However, when surface channel devices are used, in order to make both NMOS devices and PMOS devices have lower threshold voltages, it is necessary to use different types of doping for the gate polysilicon of NMOS devices and PMOS devices, and to use N-type doping for NMOS devices. For PMOS devices, use P-type doped gate polysilicon, and finally realize the interconnection of two differently doped gate polysilicons by forming metal silicides on each gate polysilicon. However, when the gate polysilicon is directly covered with a metal silicide, the doping elements in the gate polysilicon will diffuse into the metal silicide, and finally affect the performance of...

AI Technical Summary

Problems solved by technology

The protruding metal oxide layer 8 will cause difficult control of the key dimensions of the gate spacer and leakage between the gate and the source and drain.

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