Single-ended amplitude detector and single-ended amplitude detecting unit
A detector and amplitude technology, applied in the design field of single-ended amplitude detection circuits, can solve problems such as poor consistency, and achieve the effects of small process deviation, easy analysis, and simple circuit structure
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Embodiment 1
[0059] Such as Picture 10 In the single-ended amplitude detector structure shown, two sets of current mirror circuit units are used in this embodiment. In the first group of current mirror units, the first current mirror mirror terminal circuit is a mirror circuit of the first current mirror source terminal circuit. In the second group of current mirror units, the second current mirror mirror terminal circuit is a mirror circuit of the second current mirror source terminal circuit. The two sets of current mirror circuit units are respectively arranged on the DC voltage input circuit, the AC current generating circuit and the current amplifying and filtering circuit. The direct current voltage input circuit includes a first current mirror source terminal circuit and a current source connected to each other. The alternating current generating circuit includes a first current mirror mirror terminal circuit. The current amplifying and filtering circuit includes a second current ...
Embodiment 2
[0061] reference Picture 11 The amplitude detector circuit shown. In the figure, the PMOS tube Mp1 and the current source form the DC voltage input circuit; R1 and C1 form the first RC circuit; the PMOS tube Mp2 is the AC current generating circuit; the NMOS tube Mn1, R2, C2, and the NMOS tube Mn2 form the current amplification filter Circuit, where R2 and C2 form a second RC circuit; PMOS tube Mp3 is a DC voltage output circuit. The voltage difference on the PMOS tube Mp3 is the output signal Vout of the amplitude detector. The input signal Vin is superimposed with the output DC voltage signal of the first RC circuit through the DC blocking capacitor Cc. In addition, a bypass capacitor C3 can be set in the AC current generating circuit in the circuit.
[0062] When there is no input signal, the PMOS tubes Mp1 and Mp2 form a 1:1 current mirror, and the NMOS tubes Mn1 and Mn2 form a 1:M current mirror. The first RC circuit formed by the resistor R1 and the capacitor C1, viewed...
Embodiment 3
[0094] Such as Figure 13 As shown, the NMOS and PMOS in the second embodiment are interchanged, power and ground are interchanged, and the circuit is inverted to form a Picture 11 Fully symmetrical amplitude detector. The circuit design method, analysis and description are the same as the aforementioned Picture 11 The circuit is exactly the same, so I won't repeat it here.
[0095] Figure 14 Given the use of two amplitude detectors proposed by the present invention ( Picture 11 or Figure 13 The structure shown) constitutes a new amplitude detection unit. The amplitude detector 1 receives the external input signal, and the output is connected to the non-inverting input terminal of the subtractor / amplifier. The input of the amplitude detector 2 is grounded, and the output is connected to the inverting input terminal of the subtractor / amplifier. The subtraction / amplifier subtracts the input voltage, amplifies and outputs the voltage difference, and the amplification factor is...
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