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Semiconductor device and method for manufacturing semiconductor device

A semiconductor, conductive type technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems such as low capacitance, and achieve the effect of reducing DC voltage fluctuations

Inactive Publication Date: 2013-07-24
FUJITSU LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, prior art decoupling capacitors tend to have lower capacitance at higher frequencies

Method used

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  • Semiconductor device and method for manufacturing semiconductor device
  • Semiconductor device and method for manufacturing semiconductor device
  • Semiconductor device and method for manufacturing semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0020] The decoupling capacitor has a CMOS structure. For example, an insulating film is formed on an n-type impurity region in an upper portion of a p-type well in a silicon substrate. An upper electrode is formed on the insulating film. An n-type impurity region is formed next to the upper electrode. The n-type impurity region under the upper electrode and the n-type impurity region next to the upper electrode may have substantially equal impurity concentrations.

[0021] The upper electrode is made of a polysilicon film. The polysilicon film is doped with impurities of the same conductivity type as the n-type impurity region below it, for example, n-type impurities. Thus, a capacitor with better frequency response is formed. One of n-type and p-type may be the first conductivity type, and the other may be the second conductivity type.

[0022] A silicon-on-insulator (SOI) substrate on which a p-type silicon layer having a uniform impurity concentration is formed on an ...

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PUM

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Abstract

The application relates to a semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a capacitor, the capacitor includes: a first semiconductor region of a first conductivity type; a second semiconductor region of the first conductivity type disposed on the first semiconductor region, the second semiconductor region having a higher first-conductivity-type impurity concentration than the first semiconductor region; a third semiconductor region of the first conductivity type disposed on the second semiconductor region, the third semiconductor region including a contact region and having a higher first-conductivity-type impurity concentration than the second semiconductor region; a dielectric film disposed on the third semiconductor region; and an upper electrode disposed on the dielectric film beside the contact region.

Description

technical field [0001] Embodiments discussed herein relate to semiconductor devices. Background technique [0002] Logic circuits or complementary metal-oxide-semiconductor (CMOS) circuits in the semiconductor device are coupled to a pair of power supply lines for providing direct current (DC) power. Decoupling capacitors called bypass capacitors are coupled in parallel to the pair of power supply lines to reduce voltage fluctuations in the DC power supplied to the pair of power supply lines. [0003] The prior art is disclosed in Japanese Laid-Open Patent Publication Nos. 2007-157892 and 2003-347419. [0004] As the frequency of signals handled by semiconductor devices becomes higher, decoupling capacitors that reduce voltage fluctuations at high frequencies can be used. However, prior art decoupling capacitors tend to have lower capacitance at higher frequencies. This is undesirable for high-speed operation of semiconductor devices. Contents of the invention [0005]...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/06H01L21/822
CPCH01L27/0629H01L29/94H01L28/40H01L27/02
Inventor 石塚刚田代浩子
Owner FUJITSU LTD