Trench channel layout method of TSV in 3D integrated circuit
A technology of integrated circuits and layout methods, applied in the field of automatic layout, to achieve the effect of compact layout
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[0044] A schematic diagram of the structure of a 3D integrated circuit such as figure 1 shown. A 3D circuit is a structure in which multi-layer 2D chips are stacked in the vertical direction, and the structural relationship between any two layers of adjacent chips is as follows: figure 1 The top chip 6 and the bottom chip 7, the standard unit 8 in the chip is the basic structure for the storage and transmission of integrated circuit signals, and the metal interconnection line 9 connects the standard unit to complete the interconnection on the single-layer chip. TSV1 interconnection is used for cross-layer interconnection of standard cells to complete cross-layer transmission of signals. The structure of TSV1 is a via hole passing through two adjacent layers of the 3D integrated circuit chip.
[0045] The present invention is dedicated to optimizing the layout where TSV positions have been preliminarily determined, so that the spacing of all TSVs meets the requirements of the...
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