Built-in endurance test system, aging test device and corresponding endurance testing method

Abstract

The invention provides a built-in endurance test system, an aging test device and a corresponding endurance test method. The built-in endurance test system comprises a power supply end, a grounding end, a clock end and an output end; the built-in endurance test system is started through the power supply end, the grounding end and the clock end, and carries out the endurance test to a chip and outputs the endurance test results through the output end; the aging test device comprises a whole machine test plate, at least a group of chips, the built-in endurance test system, a decoder and terminal test equipment, wherein the chips are arranged on the whole machine test plate; the built-in endurance testing system is integrated in each chip; the decoder is used for receiving the endurance test results output by the built-in endurance test system; the terminal test equipment is used for determining the chips which can not realize the endurance test according to the decoding results output by the decoder, so as to solve the problems that the sample quantity is less, the endurance test period is long, whether the reading kinetic energy of a chip sample is invalid or not can not be judged automatically, and the test cost is expensive during endurance test of each batch chips.

Description

technical field [0001] The invention belongs to the technical field of charge pumps, and in particular relates to a built-in endurance test system, an aging test device and a corresponding endurance test method. Background technique [0002] At present, the burn-in test device consisting of a semiconductor burn-in board (burn in board) and a high-temperature equipment (oven) performs endurance tests on semiconductor chips. System, place the semiconductor aging test board on the high-temperature equipment; adjust the temperature of the high-temperature equipment to conduct a batch of endurance tests; update the chip samples on the semiconductor aging test board at least twice, and repeat a batch of endurance tests each time. [0003] First of all, in order to know the endurance status of semiconductor chips, it is necessary to conduct endurance tests on hundreds of chip samples through the endurance test system. Since a maximum of 77 chip samples can be placed on the semicond...

AI Technical Summary

Problems solved by technology

[0008] The purpose of the present invention is to provide a built-in endurance test system, an aging test device and a corresponding endurance test method to solve the problem that the number of endurance test samples carried out in each batch is small, the endurance test cycle is too long, and it is impossible to automatically judge the readout of chip samples. Problems with kinetic energy failure and expensive testing

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