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Low-power-consumption self-cutting-off circuit and level switching circuit thereof

A conversion circuit and low power consumption technology, which is applied in the field of power control, can solve problems such as unpredictable output and achieve the effect of reducing power consumption

Active Publication Date: 2013-11-27
BRITE SEMICON SHANGHAI CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the working level of the digital circuit is different from that of the power circuit, it is inevitable that the voltage cut-off signal passes through a level conversion circuit before being sent to the power circuit.
At the same time, since the voltage of the digital circuit is completely cut off after power off, the level conversion circuit using the Latch (latch) structure, for example, is figure 1 or figure 2 As shown in the similar circuit, after the power supply VDD2 of the digital circuit is completely powered off, its output will not be expected and cause problems

Method used

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  • Low-power-consumption self-cutting-off circuit and level switching circuit thereof
  • Low-power-consumption self-cutting-off circuit and level switching circuit thereof
  • Low-power-consumption self-cutting-off circuit and level switching circuit thereof

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Embodiment Construction

[0031] The present invention provides as Figure 8 The low-power self-power-off circuit shown includes a working circuit 401 , a level conversion circuit 402 , noise reduction circuits 403 , 406 , 407 , a flip-flop 404 , a power supply circuit 405 , an AND gate 408 , and a tie-high circuit 409 .

[0032] The working circuit 401 works in the VDD2 voltage domain, and other circuits work in the VDD1 voltage domain. The control circuit of the working circuit 401 generates a voltage shutdown signal PD, which is converted into a signal in the VDD1 voltage domain by the level conversion circuit 402 , and then connected to the clock terminal CK of the flip-flop 404 after being processed by the noise reduction circuit 403 . Under the control of the output terminal Q of the flip-flop 404, the power supply circuit 405 determines whether to supply voltage to VDD2. The power supply circuit 405 can be an LDO circuit, a DC / DC circuit, etc., which can generate another voltage output VDD2 fro...

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PUM

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Abstract

The invention provides a low-power-consumption self-cutting-off circuit and a level switching circuit of the low-power-consumption self-cutting-off circuit. When a voltage cutting-off signal generated by a working circuit hops from a low level to a high level, voltage domain switching of the signal is conducted through the level switching circuit, the signal is sent to the clock end of a trigger, and then the output end of the trigger outputs high voltage to a power circuit so that the voltage provided for the working circuit by the power circuit can be cut off. After the voltage supplying is cut off, the level of the voltage cutting-off signal of the working circuit slowly returns to zero, and the level of the signal output by the level switching circuit is kept being clamped at a low level. A low level efficient signal of a power-on reset signal is awakened to be connected to the trigger through an and gate and is reset so that the power circuit can be controlled to normally provide the voltage for the working circuit. Under the condition that a power supply is shut down, according to the low-power-consumption self-cutting-off circuit and the level switching circuit of the low-power-consumption self-cutting-off circuit, the level of a power cutting-off signal can be kept unchanged, therefore, the off-position is kept, and power consumption is reduced. Meanwhile, no static power consumption is produced by the circuits when the circuits work normally.

Description

technical field [0001] The invention belongs to the field of power supply control, and in particular relates to a low power consumption power supply output power-off circuit and a level conversion circuit therein. Background technique [0002] With people's demands on mobile electronic devices and standby time, it is a challenge to extend the standby time while improving chip performance by controlling the chip's dynamic power consumption and standby leakage power consumption. To this end, the current SoC chip design adopts a number of power consumption control technologies, including dividing the chip into multiple voltage domains, and cutting off the power supply of a certain functional module of the chip when it does not need to work to save power consumption. [0003] Meanwhile, SoC chips usually contain digital circuits and multiple analog circuit modules. Digital circuit blocks usually work at lower voltages to save power consumption. The voltage of digital circuits ...

Claims

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Application Information

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IPC IPC(8): G05B19/042
Inventor 戴颉职春星
Owner BRITE SEMICON SHANGHAI CORP
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