Hybrid integrated circuit device and packaging method
A hybrid integrated circuit and packaging method technology, which is applied in the direction of circuits, measuring devices, microstructure devices, etc., to achieve the effects of reducing packaging volume and thickness, reliable lead connection, and novel structure
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0034] The following embodiments can further illustrate the present invention, but do not limit the present invention in any way.
[0035] Such as Figure 1-3As shown, a hybrid integrated circuit device includes a Kovar 4J29 housing 9 with more than 90% of the material used, and an insulating substrate 2 is provided on the bottom 3 of the housing, and a conductive pattern 6 is printed on the insulating substrate 2. On the conductive pattern 6 The circuit elements are fixed, and the inner and outer sides of the bottom of the housing 9 are respectively provided with an upper lead 13 and a lower lead 1 connected to the conductive pattern 6, the conductive pattern 6 is welded to the upper lead 13, and the conductive pattern 6 and the lower lead 1 are bonded. The upper lead 13 does not protrude from the outer bottom 4 of the housing. The distance L3 from the bottom end of the upper lead to the outer bottom of the housing is 0.8-1.2mm. The bottom end of the upper lead 13 is covered ...
PUM
| Property | Measurement | Unit |
|---|---|---|
| width | aaaaa | aaaaa |
| width | aaaaa | aaaaa |
| diameter | aaaaa | aaaaa |
Abstract
Description
Claims
Application Information
Login to View More 