Verification system and method of sequential control circuit

Abstract

The invention provides a verification system and method of a sequential control circuit. The verification system of the sequential control circuit comprises a field-programmable gate array which is used for setting up the sequential control circuit to be verified and an IIC bus controller. The IIC bus controller is connected to the sequential control circuit and is used for receiving testing instructions from an IIC bus debugging interface and analyzing the testing instructions, and reading-writing operation instructions generated by analyzing are sent to the sequential control circuit. The sequential control circuit receives and executes the reading-writing operation instructions. The verification system further comprises the IIC bus debugging interface which is connected to the IIC bus controller, and the IIC bus debugging interface receives the input testing instructions and transmits the testing instructions to the IIC bus controller. According to the sequential control circuit verification mode based on the field-programmable gate array, the IIC bus controller of hardware is achieved, soft supporting is of no need, a CPU module is of no need, and a quick and convenient debugging method is achieved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a verification system for a timing control circuit and a verification method for a timing control circuit. Background technique [0002] The timing control circuit (TCON) is an important module on the display device, which provides timing control signals for the drive circuits on the display device (such as source drive circuit, gate drive circuit and VCOM polarity control), and processes image data (FRC, OD, etc.), so as to realize the display control of the analog RGB signal. Since different manufacturers and different series of display panels use different source drive circuits and gate drive circuits, the corresponding timing control signals will be different, and the TCON chip must meet the requirements of being compatible with multiple types of display panels. [0003] Before the TCON chip is taped out, the TCON function needs to be verified. During the verifi...

AI Technical Summary

Problems solved by technology

There are many systems that use the JTAG interface for debugging. This method first requires the system to have a CPU that supports this debugging interface, and must also have a debugger and debugging software that support this debugging interface, so there are many restrictions; another commonly used debugging method The register is debugged through the UART interface. This method requires a simple hardware debugging tool (RS232-TTL adapter board), and the selected debugging interface is also simple, and most systems will have a UART interface, but if you need to debug the internal TCON chip For the registers of all modules, the CPU inside the TCON chip must work and run the UART driver software. In the early stage of tcon verification, for example, when verifying a module alone, the CPU must be added, and the CPU must be configured to work normally. It is necessary to write UART driver software before debugging, which will undoubtedly increase the workload and difficulty of debugging, and increase the debugging time

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