Self-aligned multi-patterning mask layer and formation method thereof

Abstract

The invention relates to a self-aligned multi-patterning mask layer and a formation method thereof. The formation method comprises the following steps that: a semiconductor substrate is provided and a to-be-etched material layer is formed at the surface of the semiconductor substrate; a sacrificial material layer is formed at the surface of the to-be-etched material layer; etching is carried out on the sacrificial material layer to form a sacrificial layer, wherein the dimension of the portion, approaching the to-be-etched material layer, of the sacrificial layer is smaller than that of the portion, far away from the to-be-etched material layer, of the sacrificial layer; and a side wall is formed at the surface of the side wall of the sacrificial layer, wherein the portions of the two sides of the side wall are inclined towards the middle portion of the side wall from a position at the surface of the to-be-etched material layer to a position far away from the surface of the to-be-etched material layer. Because the portions of the two sides of the side wall are inclined towards the middle portion of the side wall and the profile shapes of the portions of the two sides of the side wall are identical with each other, the shapes of side walls of the to-be-etched material layer formed by etching by using the side wall as the mask subsequently are identical, so that the electrical performance of the semiconductor device that is formed subsequently is not influenced.

Description

Technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular to a self-aligned multiple patterned mask layer and a forming method thereof. Background technique [0002] In the field of semiconductor manufacturing, photoresist materials are used to transfer a mask image to one or more layers of materials, for example, to transfer the mask image to a metal layer, a dielectric layer, or a semiconductor substrate. However, as the feature size of the semiconductor process continues to shrink, it becomes more and more difficult to form a mask pattern with a small feature size in the material layer using a photolithography process. [0003] In order to improve the integration of semiconductor devices, the industry has proposed a variety of dual patterning processes, among which a self-aligned double patterning (SADP) process is one of them. The US patent document with the publication number US2009 / 0146322A1 discloses a method for etching...

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Problems solved by technology

[0008] But after using the above-mentioned self-aligned double pattern as a mask to etch the material layer 20 to be etched, the side walls of the material layer 20 to be etched corresponding to the two sides of the side wall 45 have different shapes, which will affect Electrical properties of subsequently formed semiconductor devices

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