Calculation method for fast estimating yield of integrated circuit

A technology of integrated circuits and calculation methods, applied in the fields of calculation, electrical digital data processing, special data processing applications, etc., can solve the problems of accuracy, difficult to solve high-dimensional sampling problems, etc., achieve rapid estimation, improve yield estimation efficiency, The effect of improving efficiency
CN103577646AActive Publication Date: 2014-02-12PKU HKUST SHENZHEN HONGKONG INSTITUTION

Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
PKU HKUST SHENZHEN HONGKONG INSTITUTION
Publication Date
2014-02-12

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Abstract

The invention relates to a calculation method for fast estimating the yield of an integrated circuit. The calculation method includes the steps that input original parameter variables are determined and orthogonalized according to elements or key elements in a circuit unit in the integrated circuit to be analyzed, and the number Y of the parameter variables is the number of technological parameters which are the most sensitive to the characteristics of the circuit; rmax is determined through original sampling points in normalized Gaussian distribution, and the cumulative distribution function value in chi distribution of the Y-dimension space is equal to a set sampling precision value; M evenly distributed sampling points are acquired in a hypersphere with the radius of rmax; the failure probability of the circuit unit is calculated on the basis of the M sampling points. The calculation method for fast estimating the yield of the integrated circuit is more precise and reliable in searching for failure areas; simulation research results show that the calculation method achieves a good compromise between efficiency, precision and searching for the failure areas, the yield of the digital circuit can be effectively estimated fast, and the efficiency is improved substantially.
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Description

technical field

[0001] The invention relates to the technical field of integrated circuit testing and design, in particular to a calculation method for rapidly estimating the yield rate of integrated circuits. Background technique

[0002] In recent years, with the continuous reduction of device size, traditional metal oxide semiconductor field effect devices have encountered physical bottlenecks in various small sizes, and further development has been limited. One of the very important limiting factors is the fluctuation of the process parameters of the device under the small size. The statistical deviation of various parameters related to the process and the device itself increases with the decrease of the size. This random fluctuation leads to the drift of the electrical performance parameters of the device, thus causing the statistical deviation of the electrical index of the circuit. The direct result of these deviations is that some circuits with severe electrical cha...

Claims

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