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Calculation method for fast estimating yield of integrated circuit

A technology of integrated circuits and calculation methods, applied in the fields of calculation, electrical digital data processing, special data processing applications, etc., can solve the problems of accuracy, difficult to solve high-dimensional sampling problems, etc., achieve rapid estimation, improve yield estimation efficiency, The effect of improving efficiency

Active Publication Date: 2014-02-12
PKU HKUST SHENZHEN HONGKONG INSTITUTION
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AI Technical Summary

Problems solved by technology

As an improved alternative to Monte Carlo methods, researchers and engineers have proposed many solutions, the most popular usually being importance sampling [1] (references [1] R.Kanj, R.Joshi, and S.Nassif, "Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events," in Proc.ACM / IEEE Design Automat.Conf., Jun.2006.) or Markov chain-based sampling method[2 ] (reference [2] Changdao Dong, Xin Li, "Efficient SRAM failure rate prediction via Gibbs sampling," Proceedings of the48th Design Automation Conference, June05-10, 2011, San Diego, California.), however, although these two methods The sampling efficiency is high, but the former is difficult to solve the high-dimensional sampling problem and the difficulty of multi-failure area sampling, and the latter often has accuracy problems and can only play its due role in specific situations

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  • Calculation method for fast estimating yield of integrated circuit
  • Calculation method for fast estimating yield of integrated circuit
  • Calculation method for fast estimating yield of integrated circuit

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Embodiment Construction

[0035] First, the calculation method for quickly estimating the yield rate of integrated circuits in the present invention is described:

[0036] (1) Principle

[0037]The basis of the algorithm of the present invention is to uniformly sample in the multi-dimensional spherical space, and then calculate the weighted probability according to the location of each sampling point to derive the probability of occurrence in the original distribution situation, thereby calculating the yield rate of a single unit circuit. Taking the two-dimensional case as an example, the brief description is as follows: figure 2 The left half of corresponds to the distribution of random sampling points in the case of the original Gaussian distribution. The shaded area is the failure area. It can be seen that most of the sampling points are concentrated in the middle part, and there are very few sampling points in the failure area. As a result, the estimation of the failure area requires a very large...

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Abstract

The invention relates to a calculation method for fast estimating the yield of an integrated circuit. The calculation method includes the steps that input original parameter variables are determined and orthogonalized according to elements or key elements in a circuit unit in the integrated circuit to be analyzed, and the number Y of the parameter variables is the number of technological parameters which are the most sensitive to the characteristics of the circuit; rmax is determined through original sampling points in normalized Gaussian distribution, and the cumulative distribution function value in chi distribution of the Y-dimension space is equal to a set sampling precision value; M evenly distributed sampling points are acquired in a hypersphere with the radius of rmax; the failure probability of the circuit unit is calculated on the basis of the M sampling points. The calculation method for fast estimating the yield of the integrated circuit is more precise and reliable in searching for failure areas; simulation research results show that the calculation method achieves a good compromise between efficiency, precision and searching for the failure areas, the yield of the digital circuit can be effectively estimated fast, and the efficiency is improved substantially.

Description

technical field [0001] The invention relates to the technical field of integrated circuit testing and design, in particular to a calculation method for rapidly estimating the yield rate of integrated circuits. Background technique [0002] In recent years, with the continuous reduction of device size, traditional metal oxide semiconductor field effect devices have encountered physical bottlenecks in various small sizes, and further development has been limited. One of the very important limiting factors is the fluctuation of the process parameters of the device under the small size. The statistical deviation of various parameters related to the process and the device itself increases with the decrease of the size. This random fluctuation leads to the drift of the electrical performance parameters of the device, thus causing the statistical deviation of the electrical index of the circuit. The direct result of these deviations is that some circuits with severe electrical cha...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 叶韵何进朱莹杜彩霞梅金河曹宇陈文新朱小安王成
Owner PKU HKUST SHENZHEN HONGKONG INSTITUTION
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