Simulation circuit and method used for SOI (silicon on insulator) high-voltage PMOS (P-channel metal oxide semiconductor) device
A technology for simulating circuits and devices, applied in circuits, semiconductor devices, CAD circuit design, etc., can solve problems such as inability to reflect the application of devices, inconsistent potential differences, etc.
Active Publication Date: 2014-02-12
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology
[0003] The present invention aims to solve the problem that the potential difference between the source S and the substrate BG in the conventional SOI high-voltage PMOS breakdown characteristic simulation and test method does not match the potential difference in the actual application, so that it cannot reflect the actual application of the device. A simulation circuit and simulation method for SOI high-voltage PMOS devices
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[0025] In this example, a high-voltage SOI linear variable doping field PMOS used for 300V is taken as an example to compare the simulation method of breakdown characteristics of the present invention with that of the traditional method.
[0026] like Figure 4 Shown is the structure of the high-voltage SOI linear variable doping field PMOS in this example, wherein the thickness of the buried oxide layer 6 of the SOI structure is 3 μm, the thickness of the silicon layer on the buried oxide layer 6 is 1.5 μm, and the n-type drift region 1 and p Type drift region 2 adopts reduced surface electric field (Reduced SURface field, RESURF) technology and lateral variable doping (Variation of Lateral Doping, VLD) technology, and also includes n-type sink layer 3, n-type well region 4, p-type buffer Region 5, buried oxide layer 6, p-type substrate 7, drain p-type highly doped region 81, source level p-type highly doped region 82 and source level n-type highly doped region 9. The n-type...
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The invention relates to a semi-conductor technology, in particular to a simulation circuit and method used for an SOI (silicon on insulator) high-voltage PMOS (P-channel metal oxide semiconductor) device. The simulation circuit used for the SOI high-voltage PMOS device comprises a PMOS transistor, and is characterized in that a drain electrode of the PMOS transistor is connected with a variable voltage source Vnh, a substrate is connected with a fixed voltage source VHV, and a gate electrode and a source electrode are grounded. The simulation circuit and method have the benefits as follows: the electric potential difference between the source electrode and the substrate of the high-voltage PMOS transistor is a fixedly applied high-voltage supply voltage VHV, and is equal to a fixed voltage value applied to the substrate; with the adoption of the provided breakdown voltage simulation circuit and method for the SOI high-voltage PMOS transistor, the defect that the electric potential difference between the source electrode and the substrate of the high-voltage PMOS transistor in a conventional simulation circuit and test method is changed with voltage Vnh applied to the drain electrode is overcome, and the simulation circuit and method more meets the condition of the SOI high-voltage PMOS transistor in actual application. The simulation circuit and method are particularly applicable to simulation of the SOI high-voltage PMOS transistor.
Description
technical field [0001] The invention relates to semiconductor technology, in particular to a breakdown characteristic simulation circuit for SOI high-voltage PMOS devices and a simulation method thereof. Background technique [0002] In recent years, SOI technology has been widely used in the field of high-voltage integrated circuits due to its high speed, low power consumption, high integration and excellent isolation, such as automotive electronics, household appliances, industrial control, medical applications, etc. The application circuit of conventional SOI high-voltage PMOS devices such as figure 1 As shown, where Vin is a low-voltage input signal, Vout is a high-voltage output signal, and VHV is a high-voltage circuit power supply. The input signal Vin is adjusted by the control circuit to output two low-voltage signals, one of which passes through the low-end drive circuit to drive the high-voltage NMOS of the high-voltage output stage, and the other passes through ...
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IPC IPC(8): H01L29/78G05B17/02
CPCG06F30/30
Inventor 乔明何逸涛张康代刚吴文杰张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA