A Single Event Soft Error Vulnerability Identification Method Applicable to Processor System

Abstract

A method applied to recognizing vulnerabilities of single-event soft errors in processor systems includes: based on influences of single-event soft error protective design upon system performance and resources, establishing an importance function module for vulnerability recognition model analytic protection; according to an operating principle of compilation instructions, dividing an element circuit node (a specific function / subfunction module used for pre-compiling codes or instruction sequences) from code level of design, extracting vulnerability factors of the element circuit node from instruction level by compile mapping relation, and performing grade domain division; finally, subjecting uncertainty intervals (gray level intervals) of vulnerability factor grading for the element circuit node to credibility evaluation according to a gray level system theory, and acquiring computation results according to grade credibility sorting. The method has the advantages that the simple vulnerability analysis method for processor systems is provided, system cost and performance loss are reduced on the premise of implementing reliability, and system protection effect is improved.

Description

technical field [0001] The invention relates to a single-event soft-error vulnerable point identification method applicable to a processor system, and belongs to the technical field of system anti-single event effect fault tolerance. Background technique [0002] In space applications, processor systems are widely used in data and information processing fields such as high-speed data transmission, signal communication, and navigation processing. However, system design using single-event protection measures will sacrifice system performance and resources, and inhibit the effective use of system performance. Therefore, under the premise that resource overhead and performance requirements deviate, the vulnerability identification modeling method will provide guidance for the design of an effective single event soft error protection scheme for the processor system, and realize the high reliability design of the processor system. [0003] The current related technologies mainly f...

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Problems solved by technology

The first type of fault test program design is to use fault injection simulation to complete the identification and analysis of vulnerable points, so this type of technology has high requirements for the grasp of the functional structure characteristics of the system and the coverage of fault tests

When faced with a system design with a complex structure, the application of this type of technology is difficult and the implementation complexity is high

The modeling and design of the second test algorithm is to analyze the loopholes in the program design. In the code area in the middle of the program, the method of loading dynamic test programs is used to complete the software vulnerability analysis. Therefore, this type of technology needs to study different design code styles and carry out separate Debugging and technical implementation are more difficult

When faced with complex structural design, there are disadvantages of weak application range and versatility

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