A H.264 two-dimensional parallel post-processing deblocking filter hardware implementation method

Abstract

The invention discloses an H.264 two-dimensional parallel post-processing block removing filter hardware achieving method which can achieve two-dimensional parallel execution of filtering operation of a horizontal boundary and a vertical boundary, greatly improves the settling operation speed of a filter, and improves the processing speed and the data throughout of a whole filtering system. Single 16*16 macro block filtering processing only needs 118 clock periods, the requirement for real-time processing is met, the filtering sequence is adjusted by reasonably utilizing the data dependence between the blocks, a data temporary register is added to temporarily store the middle data, and middle data storage, external storage repeated reading and writing and chip circuit scale are reduced.

Description

Technical field [0001] The present invention relates to a hardware implementation method of H.264 two-dimensional parallel post-processing deblocking filter in the field of digital video technology. It is used to eliminate the blocking effect in H.246 encoded video. The deblocking filtering method of post-processing in the .264 standard and its hardware implementation. Background technique [0002] H.264, as one of the mainstream video compression coding standards, is a video coding standard developed by the Joint Video Team (JVT). In the H.264 standard, the pixels in the video bounding box are divided into 16×16 macros, and each 4×4 block in each macro block is subjected to shape coding, motion estimation / motion compensation, and transform coding, etc. , Since the H.264 / AVC standard is block-based compression coding, it will produce a block effect. The residual DCT transform of block-based intra-frame and inter-frame prediction, transform coefficient quantization and inverse q...

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Problems solved by technology

[0004] The deblocking filter introduced in the H.264 / AVC standard is based on 4×4 blocks for filtering operations and the four boundaries of each block need to be filtered, so the amount of data calculation is large, and its calculation amount probably occupies the decoder. Calculate 1 / 3 of the total amount; at the same time, the basic filtering order of the filter is as follows image 3 Shown: first perform vertical filtering on the horizontal boundary of the block from top to bottom, and then perform horizontal filtering on the vertical boundary from left to right. This filtering sequence requires frequent reading and writing of pixel value data to the external memory, which consumes a lot of hardware resources, and the filtering speed is not high, and it is difficult to meet the requirements in real-time decoding. These are the bottleneck problems that we need to solve urgently.

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