Three-dimensional chip redundant TSV fault-tolerant structure with function of transferring signal

Abstract

The invention discloses a three-dimensional chip redundant TSV fault-tolerant structure with the function of transferring a signal. A three-dimensional chip comprises an upper-layer wafer and a lower-layer wafer. The upper-layer wafer and the lower-layer wafer are respectively provided with circular holes which are vertically and horizontally arrayed to form multiple rows and columns. Each circular hole in the upper-layer wafer and the corresponding circular hole in the lower-layer wafer are connected through a TSV. On the upper-layer wafer and the lower-layer wafer, the ends of all the TSVs are respectively connected with a signal transmission terminal through a multi-way selector. The upper-layer wafer and the lower-layer wafer are respectively provided with two crossbar switches, and all the crossbar switches are connected with the multi-way selectors. The crossbar switches of the upper-layer wafer are correspondingly connected with the crossbar switches of the lower-layer wafer through two redundant TSVs. The three-dimensional chip redundant TSV fault-tolerant structure has the advantages that the problem that a signal cannot be transmitted normally due to a TSV failure can be solved, the yield of the chip is effectively improved, hardware cost is low, the structure is simple, and the fault-tolerant capacity is high.

Description

technical field [0001] The invention relates to a 3D chip redundant through-silicon hole fault-tolerant structure with the function of transferring signals. Background technique [0002] With the development of integrated circuits, more and more devices are integrated on a single chip, and the circuits are developing in the direction of smaller and higher density. However, the problems of delay and power consumption caused by interconnect lines are becoming more and more prominent. Three-dimensional integrated circuit (3D IC) is an emerging technology. Due to its advantages in packaging density and flexibility of heterogeneous integration, it is considered to be an effective integrated circuit development technology. It usually uses vertical interconnection to replace ordinary The two-dimensional interconnection, vertical stacking reduces the chip area and reduces the delay. [0003] Through-Silicon Vias (TSV) is an important technology in 3D IC. Through-Silicon Vias realiz...

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Problems solved by technology

[0008] In order to avoid the shortcomings in the above-mentioned prior art, the present invention provides a 3D chip redundant through-silicon hole fault-tolerant structure with the function of transferring signals, so as to solve the signal problem caused by the failure of the through-silicon hole in the three-dimensional integrated chip. The problem of not being able to transmit normally

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