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Clock generating apparatus, method for clock generating apparatus, and fractional frequency divider

A technology of clock generation device and frequency divider, which is applied in the field of frequency offset correction, fractional frequency divider, and clock generation device, can solve the problems of process, voltage, temperature and other sensitivity to variation, and oscillator design complexity, etc., to achieve Excellent anti-jitter effect, high frequency accuracy effect

Active Publication Date: 2014-05-07
MEDIATEK INC
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Problems solved by technology

However, because the analog control method is extremely sensitive to variations in process, voltage, temperature, etc., if the method of analog control is used, the design of the traditional oscillator will become extremely complicated. This problem is more obvious in the field of advanced manufacturing processes.

Method used

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  • Clock generating apparatus, method for clock generating apparatus, and fractional frequency divider
  • Clock generating apparatus, method for clock generating apparatus, and fractional frequency divider
  • Clock generating apparatus, method for clock generating apparatus, and fractional frequency divider

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Embodiment Construction

[0012] Please refer to figure 1 , which is a schematic block diagram of a clock generating device 100 according to an embodiment of the present invention. The clock generating device 100 includes an oscillator 105 and a frequency synthesizer 110, the frequency synthesizer 110 includes a frequency divider 1101, a fractional frequency divider 1102 and a lookup table 1103, and the fractional frequency divider 1102 includes a phase selector 1104 , phase interpolator 1105 and digital processing block 1106 . The clock generating device 100 is an embedded crystal system-on-chip (SOC) circuit, that is, the clock generating device 100 is arranged on a single integrated circuit chip. An external crystal oscillator on the circuit board is required, and the implementation of the embedded crystal oscillator has the advantage of low cost in the market. In addition, the clock generating device 100 can generate and output the target clock signal CLK according to the internal reference clock...

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Abstract

The invention provides a clock generating apparatus, a method for the clock generating apparatus, and a fractional frequency divider. The clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus. The clock generating apparatus can achieve high frequency accuracy and good anti-shake effect at the same time.

Description

【Technical field】 [0001] The present invention relates to a clock generation mechanism, in particular to a clock generation device, a fractional frequency divider, and a method capable of correcting frequency offset. 【Background technique】 [0002] Generally speaking, a conventional oscillator can be realized by various types of oscillators. For example, a conventional oscillator can include an LC resonator in practice. Unfortunately, the frequency offset is usually caused by process variation or temperature variation, and in order to adjust this frequency offset, the traditional general method is to adjust the value of the capacitance array of the resonator of the traditional oscillator (such as the LC resonator) to to get the exact frequency. However, because the analog control method is extremely sensitive to variations in process, voltage, temperature, etc., if the method of analog control is used, the design of the traditional oscillator will become extremely complicat...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/08H03L7/18
CPCH03L1/022H03L7/1976H03K7/06H03K3/013H03L7/1974
Inventor 颜宇明刘学欣
Owner MEDIATEK INC
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