A Superjunction MOSFET with Network Epitaxial Structure

Abstract

The invention belongs to the technical field of semiconductors, and discloses a super-junction MOSFET provided with a network-shaped epitaxial structure. The super-junction MOSFET provided with the network-shaped epitaxial structure comprises a substrate, a network-shaped epitaxial layer, a well region, a junction field effect transistor JFET region, a gate dielectric layer, a polysilicon grid electrode, an isolation dielectric layer, a metal source electrode and a metal drain electrode. The network-shaped epitaxial layer grows on the substrate, the well region and the junction field effect transistor JFET region grow at the top of the network-shaped epitaxial layer alternately, the gate dielectric layer covers the top of the well region and the top of the junction field effect transistor JFET region, the polysilicon grid electrode covers the gate dielectric layer, the isolation dielectric layer covers the top of the polysilicon grid electrode, the metal source electrode covers the isolation dielectric layer, and the metal drain electrode is located at the bottom of the substrate. By the adoption of the network-shaped epitaxial layer, when a device is in a blocking state, the electric field directly directing to regions around a surface grid electrode from the bottom of the epitaxial layer does not exist, so that when the device is in a blocking state and is bombarded by heavy ions, the current path flowing to the regions around the surface grid electrode from the bottom of the epitaxial layer is avoided, and single event resistance capacity of the device is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a super junction MOSFET with a network epitaxial structure. Background technique [0002] In the field of semiconductors, the vertical MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) formed by the vertical double diffusion process is called VDMOSFET, or VDMOS for short. For traditional VDMOS, the breakdown voltage is generally increased by increasing the thickness of the epitaxial layer and reducing the doping concentration of the epitaxial layer. However, with the increase of the breakdown voltage, this method will significantly increase the resistance of the epitaxial layer. Such as figure 1 As shown, the super junction MOSFET (SJ-MOSFET) adds alternating P-N structure in the epitaxial layer, so that when the device is in the blocking state, the vertical electric field in the epitaxial layer is almost constant, which makes the on-resistance of the device hit...

AI Technical Summary

Problems solved by technology

[0004] The traditional method of suppressing VDMOS single event effect is not ideal for SJ-MOSFET, especially in aerospace environment, its ability to suppress single event effect is obviously weak

Images