Memory programming method and memory

Abstract

The invention discloses a memory programming method and memory. The method includes: determining a plurality of memory cell nodes that are continuous in each column of memory cell in the memory and have a first coded value as the coded value; grouping each column of memory cell in the memory; and optimizing the code of each sub-group and making the codes of the memory cells with the first coded value continuous. By means of optimal design on the transistor connection way of each memory cell in the memory, the memory array area is effectively reduced, the number of transistors connected to a bit line is decreased, the bit line capacitance is reduced, and the overall performance of the memory is effectively improved.

Description

technical field [0001] The present invention relates to the field of computers, and in particular, to a memory programming method and memory. Background technique [0002] Generally, a memory array includes a plurality of transistors, and the transistors need to be selectively connected to a bit line (Bit Line, BL for short) and a common voltage terminal (eg, VSS) according to different storage contents and memory programming methods. [0003] Since the transistors need to be selectively connected to the bit lines, if the number of transistors connected to the bit lines increases, the capacity of the bit lines will increase, which will have a bad effect on the performance of the memory. At the same time, whether adjacent memory cells can share the source and drain is related to the area of ​​the memory and the capacitance of the bit line, thereby affecting the overall performance of the memory. [0004] In related technical documents, no effective solution has been proposed...

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Problems solved by technology

[0005] Aiming at the problem in the related art that the area of ​​the memory array is large or the capacitance of the bit line is large and the work is affected due to the programming method of the storage unit, the present invention proposes a memory programming method and memory, which can effectively reduce the area of ​​the memory array and reduce the capacitance of the bit line

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