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Intercommunication method and application of spi and localbus

A technology of SPI interface and processor, applied in the intercommunication method of SPI and Localbus and its application field, can solve the problems of increasing system cost, achieve the effects of saving system cost, improving reliability, and reducing development difficulty

Active Publication Date: 2017-06-16
成都智科通信技术股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

There are many types of signaling control interfaces provided by the modules or chips used in each trunk line, so many network voice switching devices will use different interfaces for different trunks, or use a series of product models to meet different needs. will increase system cost

Method used

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  • Intercommunication method and application of spi and localbus

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Embodiment Construction

[0015] In order to illustrate the contents of the present invention more specifically, the interface application of a specific network voice exchange equipment is taken as an example below, and the present invention is described in detail in conjunction with the accompanying drawings:

[0016] Such as figure 1 Shown, the network voice exchange equipment comprises embedded Blackfin processor (not shown in the figure), E1 chip and CPLD, and embedded Blackfin processor comprises SPI master interface (connects with the SPI slave interface of CPLD in the figure, should be positioned at The left end of the CPLD, but because the CPLD, E1 chip and relay outlet in the figure are an integral module, so the Blackfin processor and its SPI host interface are not shown in the figure), the E1 chip includes Localbus.

[0017] The Blackfin processor uses Blackfin dual-core 500MHz BF607 as the main control chip. The BF607 has a built-in network controller, DDR controller, USB controller, and in...

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PUM

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Abstract

The invention discloses an SPI and Localbus intercommunication method for achieving communication between an SPI of a processor and a Localbus of a chip. A CPLD (Complex Programmable Logic Device) is used for connecting the SPI of the processor and the Localbus, the SPI of the processor serves as a host mode, the SPI of the CPLD serves as a slave mode, and a 50 MHz active crystal oscillator externally-connected with the CPLD serves as a synchronous clock; different processing is performed on SPI data of the processor and the Localbus according to CS (Chip Selection) signal of the SPI of the CPLD in the intercommunication method. The SPI and Localbus intercommunication method is applied to network voice exchange devices. According to the SPI and Localbus intercommunication method, due to the facts that CPLD is connected between the SPI of the processor and the Localbus of the chip and read-write operatipn of the Localbus is completely converted to the SPI of the CPLD and the SPI of the processor, connection between the chip and the processor is simplified to the largest extent, connection reliability is improved, development difficulties are reduced and system costs are greatly reduced.

Description

technical field [0001] The invention relates to a communication method and application, in particular to an intercommunication method between SPI and Localbus and its application. Background technique [0002] The SPI (Serial Peripheral Interface) interface is a serial peripheral interface, which is a high-speed full-duplex synchronous communication interface, and the system needs to be used in conjunction with the master and slave modes. The SPI interface usually uses 4 signal lines, CLK is the serial clock line, MOSI is the master output / slave input line, MISO is the master input / slave output line, and SEL is the chip select signal line. The core of the SPI controller is two shift registers, which are used for data input and output respectively. Since the signal lines used are few, the circuit design is simple, but at the same time it is very efficient. [0003] Localbus is also called CPU bus or local bus or local bus. It is divided into Motorola CPU bus and Intel CPU bu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/38G06F13/40
Inventor 林雪峰秦智王洪振
Owner 成都智科通信技术股份有限公司