A SOC dynamic voltage frequency adjustment method with forward-looking properties

A dynamic voltage and frequency adjustment technology, applied in the direction of data processing power supply, etc., can solve the problems of inability to achieve performance and power consumption, limited prediction, inability to make accurate responses, etc., to achieve the effect of ensuring performance and reducing power consumption

Inactive Publication Date: 2017-02-15
SOUTH CHINA UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Regardless of whether DVFS is implemented by software or hardware, because it is necessary to collect system load and predict the load in the next period, this makes the voltage and frequency adjustment of the system have a delay, and the balance between performance and power consumption cannot be achieved.
[0004] 2. Prediction has limitations
Since the load in the next time period is completely determined by the user and has strong randomness, the so-called forecasting algorithm and scheduling algorithm can only estimate the usage of the user to a certain extent, and cannot accurately respond to the user's request

Method used

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  • A SOC dynamic voltage frequency adjustment method with forward-looking properties
  • A SOC dynamic voltage frequency adjustment method with forward-looking properties

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Embodiment

[0031] see figure 1 As shown, the SoC system architecture diagram adopting the method of the present invention, the SoC chip includes: a touch screen controller, a power management unit (PMU, Power Management Unit), a clock management unit (CMU, Clock Management Unit), a DVFS module, and a simplified instruction set processing processor (RISC CPU), on-chip bus (SoC BUS), graphics unit (GraphicsUnit), memory controller (Memory Controller), input and output interface module (I / O Interface), etc.; and the above-mentioned SoC system-on-a-chip includes The controller, unit or module of the system adopts the form of IP core and is described in Verilog hardware description language.

[0032] The above SoC chip also manages the power consumption of the SoC system-on-chip through an external power management integrated circuit PMIC.

[0033] The working process of the present invention is described in detail below, see figure 2 Shown:

[0034] 1. After the SoC using this method is ...

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Abstract

The invention discloses a SoC (system on chip) dynamic voltage frequency scaling method with foresight and belongs to the field of chip design and application. The invention aims to solves the delay problem of dynamic voltage frequency scaling in a master control chip of a mobile device, realize the reduction of power consumption whiling guaranteeing the CPU (central processing unit) performance and improve the user experience. Compared with a traditional scaling method, the CPU dynamic voltage frequency scaling of a SoC is with foresight and is realized on the basis of the following principle: a capacitive screen controller is integrated to the SoC; the capacitive screen controller adopts the digital-analog mixed signal design, not only has the functions of digital-analog conversion, coordinate output and multipoint touch control of a traditional capacitive screen controller, but also has the functions of touch strength detection, touch frequency statistical and touch length statistical; then a DVFS (dynamic voltage frequency scaling) module outputs a CPU voltage and frequency with foresight through judgment according to the parameters and the load situation of the operating system, and the CPU voltage and frequency are also output to a power management unit and a clock management unit of the SoC for appropriate scaling.

Description

technical field [0001] The invention relates to a SoC chip power management technology, in particular to a SoC dynamic voltage frequency adjustment method with forward-looking attributes. Background technique [0002] At present, with the development of mobile devices and the popularization of SoC chips (abbreviation of System on Chip, called system-on-chip), we urgently need to reduce the power consumption of SoC chips. Great progress has been made. In order to prolong battery life, power consumption must be reduced; on the other hand, reducing power consumption is conducive to reducing device heating, improving stability and user experience. At present, in order to reduce power consumption, more and more chips support the dynamic voltage and frequency adjustment technology DVFS (Dynamic Voltage and Frequency Scaling). This type of technology (patent: 200710039255.9) mainly contains two kinds of implementation methods: 1. Software-based DVFS implementation: generally colle...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/32
Inventor 张义胡跃明陈安
Owner SOUTH CHINA UNIV OF TECH
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