Semiconductor device and manufacturing method thereof
A semiconductor and conductive type technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems such as component damage, and achieve the effects of improved short-circuit resistance, reduced saturation current value, and low contact resistance
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Embodiment approach 1
[0062] figure 1 It is a diagram schematically showing the upper surface structure of the silicon carbide MOSFET as a semiconductor device of the first embodiment. In addition figure 2 It is a diagram showing the structure of the outermost surface of the semiconductor layer of the semiconductor device. That is, the semiconductor device is figure 2 Formed on top of the semiconductor layer shown figure 1 It is composed of the elements shown.
[0063] Such as figure 1 In that way, the source pad (source electrode) 41, the gate wiring 44, and the gate pad 45 are formed on the upper surface of the chip 5 of the semiconductor device. The gate pad 45 is arranged near the center of one side of the chip 5. The gate wiring 44 is connected to the gate pad 45 and is formed so as to surround the source pad 41.
[0064] by figure 2 The area 7 surrounded by the dashed line is the active area 7 in which a plurality of unit cells 10 in which MOSFETs are arranged in parallel, and the source pad ...
Embodiment approach 2
[0146] In the first embodiment, the ion implantation for forming the source contact region 12a and the source extension region 12b and the ion implantation for forming the source resistance control region 15a are performed in different steps, but in the second embodiment , Proposed a technology of performing these processes in one ion implantation process.
[0147] Figure 21 It is a figure for demonstrating the manufacturing method of the silicon carbide MOSFET which is a semiconductor device of Embodiment 2. In this embodiment, it will be used in embodiment 1 Picture 11 The implantation mask 101a formed on the formation region of the source resistance control region 15a in the process shown in the description is as Figure 21 That replaces it with an implantation mask 101b with a thin thickness. The thickness of the implantation mask 101b is set to such a thickness that a part of the impurity penetrates during ion implantation of the impurity of the first conductivity type for...
Embodiment approach 3
[0161] In Embodiment 3, the following technique is proposed: using only one photoengraving process to form an implantation mask for forming the source contact region 12a and source extension region 12b, and an implantation mask for forming the well region 20 .
[0162] In Embodiment 3, after the source extension region 12b and the source contact region 12a are formed, the implantation mask used at that time is subjected to a cutting process, thereby processing it into a mask for forming the well region 20. Therefore, in this embodiment, the formation of the well region 20 is performed after the formation of the source contact region 12a and the source extension region 12b.
[0163] Figure 29 as well as Figure 30 It is a figure which shows the formation process of the well region 20, the source contact region 12a, and the source extension region 12b in this embodiment. Before the formation of the well region 20, such as Figure 29 In this way, the implantation masks 100d, 100dN o...
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