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Flash memory bit line selectron circuit

A technology of bit line selection and flash memory, which is applied in the field of bit line selection tube circuit, can solve the problems of high reading power consumption and power consumption that cannot meet the design requirements, and achieve the effect of saving power consumption

Active Publication Date: 2015-01-21
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of the prior art is that the work of the charge pump 103 consumes a large part of power consumption, and in non-contact applications, the requirement for read power consumption is relatively high, if the charge pump 103 is in the working state at this time , then the power consumption cannot meet the design requirements

Method used

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  • Flash memory bit line selectron circuit
  • Flash memory bit line selectron circuit
  • Flash memory bit line selectron circuit

Examples

Experimental program
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Embodiment Construction

[0018] like figure 2 shown is a circuit diagram of a bit line selection tube of the flash memory according to the embodiment of the present invention; the bit line selection tube circuit of the flash memory of the embodiment of the present invention provides voltage for the bit line BL of the memory cell of the flash memory, and the bit line selection tube circuit includes: a first The PMOS transistor M1, the second NMOS transistor M2, the third NMOS transistor M3, and the fourth NMOS transistor M4.

[0019] The source of the first PMOS transistor M1 is connected to the power supply voltage vpwr, the drain of the first PMOS transistor M1 is connected to the drain of the second NMOS transistor M2, the source of the second NMOS transistor M2, the The gate of the third NMOS transistor M3 and the drain of the fourth NMOS transistor M4 are connected together and connected to the port boost, the source of the fourth NMOS transistor M4 is grounded, and the first PMOS transistor M1 a...

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Abstract

The invention discloses a flash memory bit line selectron circuit, which comprises a first PMOS (P-channel Metal Oxide Semiconductor) tube, a second NMOS (N-channel Metal Oxide Semiconductor) tube, a third NMOS tube and a fourth NOMS tube, wherein the source electrode of the first PMOS tube is supplied with power supply voltage; the drain electrode of the first PMOS tube is connected with the drain electrode of the second NMOS tube; the source electrode of the second NMOS tube, the grid electrode of the third NMOS tube and the drain electrode of the fourth NMOS tube are connected; the source electrode of the fourth NMOS tube is grounded; a bit line selection signal is independently accessed into the grid electrode of the first PMOS tube and the grid electrode of the fourth NOMS tube; the grid electrode of the second NMOS tube is supplied with the power supply voltage; and the drain electrode of the third NMOS tube is connected with a bit line voltage source, and the source electrode of the third NMOS tube is connected with a bit line. During a read operation, a flash memory can generate voltage higher than the power supply voltage on a transmission tube grid electrode of the bit line without starting a charge pump, the power consumption of the charge pump is saved, and the flash memory can satisfy a power consumption reading requirement under non-contact application.

Description

technical field [0001] The present invention relates to a semiconductor integrated circuit, in particular to a bit line selection tube circuit of a flash memory (flash). Background technique [0002] The storage unit of Flash is non-volatile memory (NVM). When reading the NVM, it is necessary to use the bit line selection tube circuit to transmit a voltage of about 1V to the bit line. The selection tube in the bit line selection tube circuit It is directly connected to the bit line, so that the selection tube needs to withstand high voltage during the erasing and writing operations, so a high-voltage N-type MOS tube must be selected as the selection tube. However, because the high-voltage MOS tube usually has a higher threshold voltage (Vt) than the ordinary MOS tube, the Vt of the high-voltage MOS tube is about 0.9V, so in order to transmit a voltage of 1V to the bit line, it must be on this MOS tube. of at least 1.9V is applied to the gate. The power supply voltage of Fl...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/24
Inventor 刘芳芳赵艳丽沈文超
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP