Pipeline ADC (analog to digital converter) and calibration method for capacitor mismatch error of pipeline ADC

Abstract

An embodiment of the invention discloses a calibration method for a capacitor mismatch error of a pipeline ADC (analog to digital converter). On the basis of the calibration-free structure of the traditional pipeline ADC, a calibration level with the capacitor mismatch error required to be calibrated is composed of a level MDAC (multiplying digital to analog converter) structure and a level-calibrated switch structure, and meanwhile, a capacitor mismatch error digital calibration circuit is added. During the calibration-level capacitor error extracting period, two special inputs are supported by the level-calibrated switch structure to a calibration-level sampling capacitor to obtain two digital codes containing the capacitor mismatch errors, and accordingly digital calibration is performed by extracting the calibration-level capacitor mismatch error. The calibration method is simple in structure, fewer additional elements are required, sequential control is easy, and the problem that poor static characteristics, caused by capacitor mismatch, is calibrated is solved.

Description

technical field [0001] The invention relates to an analog-to-digital converter used in an infrared focal plane array readout circuit, in particular to a pipelined analog-to-digital converter and a capacitance mismatch error calibration method thereof. [0002] Background technique [0003] The readout circuit (ROIC) is one of the key components of the uncooled infrared focal plane array (IRFPA). Its main function is to preprocess the weak signal induced by the infrared detector (such as integration, amplification, filtering, sampling / holding, etc.) ) and parallel / serial conversion of array signals. Depending on the material used and the working method of the detector, the structure of the readout circuit changes accordingly to obtain the maximum signal-to-noise ratio (SNR) while meeting the requirements of the frame rate. [0004] ROIC belongs to digital-analog hybrid integration technology. The pixel circuit part is an analog circuit, which has special requirements for t...

AI Technical Summary

Problems solved by technology

[0006] In the classic non-calibration pipelined ADC, capacitance mismatch error is unavoidable due to the manufacturing process, which to some extent limits the effective trade-off between resolution and sampling rate, especially in large arrays, In the readout technology of high frame rate uncooled infrared focal plane array, there are limitations of higher resolution and higher sampling rate

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