NAND flash memory single-channel synchronous controller with dynamic instruction scheduling function
A technology of dynamic instruction scheduling and synchronous controllers, applied in memory systems, concurrent instruction execution, instruments, etc., can solve the problems of low read and write throughput, poor scalability, and single function of flash memory, and achieve improved read and write throughput and The effect of scalability
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[0059] figure 1 It is an overall architecture diagram of the present invention, and the present invention is located between the user end and the single-channel NAND flash memory chip storage array. There are four substrates in the NAND flash memory chip that the present invention selects, and substrate 1 and substrate 3 share data bus DQX[7:0]-1 and control signal ALE-1, CLE-1, DQS-1, W / R#-1, CLK-1, WP#-1, substrate 2 and substrate 4 share data bus DQX[7:0]-2 and control signals ALE-2, CLE-2, DQS-2, W / R#-2, CLK-2, WP#-2, each chip has independent chip selection signal CE# and busy signal R / B#. In the present invention, the odd-numbered or even-numbered eight substrates in the four chips are used as a storage array.
[0060] figure 2 is the M-dimensional expansion diagram of the present invention. Since there is complete parallelism between single channels, as long as the physical resources are sufficient, the user can expand the present invention according to needs to ...
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