NAND flash memory single-channel synchronous controller with dynamic instruction scheduling function

A technology of dynamic instruction scheduling and synchronous controllers, applied in memory systems, concurrent instruction execution, instruments, etc., can solve the problems of low read and write throughput, poor scalability, and single function of flash memory, and achieve improved read and write throughput and The effect of scalability

Active Publication Date: 2015-03-11
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The technical problem to be solved by the present invention is: Aiming at the shortcomings of the existing NAND flash memory controllers, such as poor scalability, insufficient reliability, single function, and

Method used

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  • NAND flash memory single-channel synchronous controller with dynamic instruction scheduling function
  • NAND flash memory single-channel synchronous controller with dynamic instruction scheduling function
  • NAND flash memory single-channel synchronous controller with dynamic instruction scheduling function

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Embodiment Construction

[0059] figure 1 It is an overall architecture diagram of the present invention, and the present invention is located between the user end and the single-channel NAND flash memory chip storage array. There are four substrates in the NAND flash memory chip that the present invention selects, and substrate 1 and substrate 3 share data bus DQX[7:0]-1 and control signal ALE-1, CLE-1, DQS-1, W / R#-1, CLK-1, WP#-1, substrate 2 and substrate 4 share data bus DQX[7:0]-2 and control signals ALE-2, CLE-2, DQS-2, W / R#-2, CLK-2, WP#-2, each chip has independent chip selection signal CE# and busy signal R / B#. In the present invention, the odd-numbered or even-numbered eight substrates in the four chips are used as a storage array.

[0060] figure 2 is the M-dimensional expansion diagram of the present invention. Since there is complete parallelism between single channels, as long as the physical resources are sufficient, the user can expand the present invention according to needs to ...

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Abstract

The invention relates to an NAND flash memory single-channel synchronous controller with a dynamic instruction scheduling function. The controller comprises five parts including a user interface layer, a dynamic instruction scheduling layer, a control layer, a physical layer and a data caching module. Complicated operation of an NAND flash memory chip is converted into a simple instruction of a client, the instruction execution efficiency is improved to the hilt, operation parallelism of different substrates is developed, the throughput rate of data read and write is increased, and for the user, operation of basic storage arrays is controlled and optimized transparently; data are read and written synchronously, eight substrates in four flash memory chips are controlled in a single channel, the dynamic instruction scheduling function and an assembly line technology are adopted, and the read-write throughput rate and extendibility of a flash memory are effectively improved; and besides, four instructions including reading, writing, erasing and moving are supported, an ECC (error correction code) module is provided, and various operation requirements of the user layer are met.

Description

technical field [0001] The invention relates to a NAND flash memory single-channel synchronous controller with a command dynamic scheduling function in a NAND Flash solid state hard disk. Background technique [0002] Solid state drive (SSD) has the advantages of fast speed, low power consumption, small size, data protection after power failure, strong shock resistance, and noiseless operation. However, compared with traditional disks, the disadvantages of high price and small capacity of solid-state drives limit their popularity in the storage field. In recent years, with the continuous improvement of the manufacturing process of flash memory, the particles of non-type flash memory chips have become smaller and smaller, but the storage capacity has become larger and larger, which has directly led to the continuous decline in the cost of manufacturing solid-state hard drives. The more popular it is in the market, the more likely it is to replace traditional disk storage. ...

Claims

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Application Information

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IPC IPC(8): G06F13/18G06F9/38
CPCG06F12/0246G06F13/1636
Inventor 肖侬欧洋刘芳吴利舟
Owner NAT UNIV OF DEFENSE TECH
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