Supercapacitor voltage equalization device and control method for the device
A supercapacitor and voltage equalization technology, applied in battery circuit devices, circuit devices, current collectors, etc., can solve the problems of shortened service life of supercapacitors, inconsistent voltage of supercapacitors, etc., to improve energy storage quality, supercapacitor capacity and internal Accurate resistance identification and high charge and discharge efficiency
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specific Embodiment approach 1
[0058] Specific implementation mode one: combine figure 1 with figure 2 Describe this embodiment, the supercapacitor voltage equalization device described in this embodiment includes a main controller 1, a total current / voltage detection unit 2, a plurality of balance controllers 3 and a DC-DC power supply module 4;
[0059] The DC-DC power supply module 4 provides working power for the main controller 1, the total current / voltage detection unit 2 and a plurality of balance controllers 3;
[0060] The main controller 1 is connected to the plurality of balance controllers 3 and the total current / voltage detection unit 2;
[0061] Each balance controller 3 is used to measure the terminal voltage of n parallel junctions of the supercapacitor and charge the n parallel junctions;
[0062] The total current / voltage detection unit 2 is used to detect the total voltage and the total current at the output port of the supercapacitor.
[0063] In this embodiment, the capacitors conne...
specific Embodiment approach 2
[0065] Specific implementation mode two: combination image 3 with Figure 4 Describe this embodiment, this embodiment is a further limitation of the supercapacitor voltage equalization device described in the first embodiment, in this embodiment, the balance controller 3 includes n parallel node balancing units 3-1, m Analog switching circuit 3-2, AD processing circuit 3-3, balance control processor 3-4, temperature signal processing circuit 3-5, optocoupler isolation communication circuit 3-6 and isolated power supply, m is less than n;
[0066] Each parallel section balancing unit 3-1 is used to charge a parallel section, and the control signal input terminal of the parallel section balancing unit 3-1 is connected to the charging control signal output terminal of the equalization control processor 3-4;
[0067] Each analog switching circuit 3-2 is used to measure the terminal voltages of multiple parallel nodes, m analog switching circuits 3-2 measure the terminal voltages...
specific Embodiment approach 3
[0075] Specific implementation mode three: combination Figure 5 with Figure 6 Describe this embodiment, this embodiment is a further limitation of the supercapacitor voltage equalization device described in Embodiment 2, in this embodiment, the AD processing circuit 3-3 includes an analog processing circuit 3-3-1, an analog / digital conversion module 3-3-2 and digital isolation module 3-3-3;
[0076] The m signal input terminals of the analog processing circuit 3-3-1 are respectively connected to the signal output terminals of the m analog switching circuits 3-2, and the signal output terminals of the analog processing circuit 3-3-1 are connected to the analog / digital conversion module 3-3 The analog signal input terminal of -2, the digital signal output terminal of the analog / digital conversion module 3-3-2 is connected to the parallel node voltage signal input terminal of the balance control processor 3-4 through the digital isolation module 3-3-3, and the digital isolati...
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