Stacked semiconductor packaging method

Abstract

The invention provides a stacked semiconductor packaging method which comprises the following steps: dies are stacked, bumps of dies on the lower layers are not covered with dies on the upper layers during stacking, wherein a bump is not arranged on a die on the top layer, and a resin material is applied above the dies and completely covers the bumps on the dies; side surfaces, coated with resin, of the dies are ground or polished, and parts of the bumps are exposed; and a conducting material is arranged on polished resin material layers and the exposed bumps. Compared with the prior art, the stacked semiconductor packaging method has the benefits as follows: by means of the novel packing structure and technology, the stacked die packing height is reduced, especially the packaging height of the die on the top layer is reduced, space of follow-up products is saved, meanwhile, the packaging method has mature technology, consumed packing material is saved, and the operation is simple and convenient. Besides, the conductive area between the bumps after packaging is increased, the electrical properties are more stable and more excellent, and the service life of a packaged product is prolonged.

Description

technical field [0001] The invention relates to a semiconductor packaging method, specifically a packaging method for stacking semiconductor chips. Background technique [0002] In recent years, stacked chip packaging has gradually become the mainstream of technology development. Stacked chip packaging technology, referred to as 3D packaging, refers to the packaging technology that stacks more than two chips in the same package in the vertical direction without changing the size of the package. It originated from the flash memory (NOR / NAND ) and stacked packaging of SDRAM. Stacked chip packaging technology is the ideal system solution for wireless communication devices, portable devices and memory cards. In recent years, the technology of consumer products such as mobile phones, PDAs, computers, communications, and digital products has developed very rapidly. The rapid development of this industry requires large-capacity, multi-functional, small-size, low-cost memories, DS...

AI Technical Summary

Problems solved by technology

But the thickness of the package is higher

Samsung proposed the implementation of laser vias, but there is no specific implementation case. Like TVS, the processing technology of via holes in the back is immature

[0006] To sum up, the traditional stacked packaging technology cannot further reduce the thickness of the packaged chip, especially the packaging height of the topmost chip.

Images