Calibration circuit and calibration method of pipeline analog-to-digital converter based on zero-cross comparison

An analog-to-digital converter and zero-crossing comparison technology, applied in the direction of analog/digital conversion calibration/testing, can solve problems such as circuit conversion errors

Active Publication Date: 2017-11-17
FUDAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] According to the working process of the above circuit, when the zero-crossing comparator 100 cannot accurately jump at the zero-crossing moment, there will be a conversion error in the circuit

Method used

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  • Calibration circuit and calibration method of pipeline analog-to-digital converter based on zero-cross comparison
  • Calibration circuit and calibration method of pipeline analog-to-digital converter based on zero-cross comparison
  • Calibration circuit and calibration method of pipeline analog-to-digital converter based on zero-cross comparison

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Embodiment Construction

[0028] The correction method provided by the present invention will be described in detail below in conjunction with the accompanying drawings. It is worth noting that the correction method provided by the present invention can be implemented in many different ways. The following embodiment is a typical implementation circuit of the correction method provided by the present invention, which is only used to illustrate the formation and use of the present invention, not for limit the invention.

[0029] The two-stage circuit of the pipeline analog-to-digital converter based on the zero-crossing comparison that has adopted the correction method provided by the present invention is as figure 2 As shown, it includes: the Nth stage pipeline circuit 211 based on zero-crossing comparison, the N+1th stage pipeline circuit 212 based on zero-crossing comparison, and the Nth stage correction circuit 200;

[0030] Wherein the Nth stage correction circuit includes: a differential 1 / f erro...

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Abstract

The invention belongs to the technical field of integrated circuits, and in particular relates to a correction circuit and a correction method of a pipeline analog-to-digital converter based on zero-crossing comparison. The correction circuit provided by the present invention is connected between the two-stage circuits of the pipeline analog-to-digital converter based on zero-crossing comparison, and the correction circuit includes a differential 1 / f error amplifier, two correction capacitors, and two transmission gate circuits; Each transmission gate circuit includes an N-type field effect transistor and a P-type field effect transistor, and the channels of the two are arranged in parallel. The correction circuit amplifies the error of the previous stage circuit and stores it on the correction capacitor, and then compensates the error to its output along with the establishment process of the latter stage circuit. The correction method provided by the invention can effectively improve the conversion precision of the circuit, and at the same time provide the sub-ADC with a longer conversion time than the traditional solution, thus reducing the speed requirement for the sub-ADC circuit.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a pipeline analog-to-digital converter correction circuit and a correction method. Background technique [0002] Based on zero-crossing comparison, it is a popular solution to realize pipelined analog-to-digital converters in recent years. Its adjacent two-stage differential circuits are as follows: figure 1 shown. Similar to the traditional switched capacitor gain stage, the differential switched capacitor gain stage based on zero-crossing comparison realizes the processing of the differential signal with twice the overhead of the single-ended circuit. The symmetrical circuit structure of the upper and lower parts forms two positive and negative channels, which respectively process the positive input and negative input of the differential input signal, and obtain the final differential output result. figure 1 Mainly including the sampling capacitor C of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/10
Inventor 任俊彦倪哲侃陈迟晓叶凡
Owner FUDAN UNIV
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