A second-order switch low-pass filter in a charge pump phase-locked loop and a locking method using the second-order switch low-pass filter to realize the loop
A low-pass filter and low-pass filtering technology, which is applied in the direction of electrical components, automatic power control, etc., can solve the problem of large VCO control voltage jitter
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specific Embodiment approach 1
[0043] Specific implementation mode one: refer to Image 6 Specifically illustrate this embodiment, the second-order switch low-pass filter in the charge pump phase-locked loop described in this embodiment, it comprises second-order switch low-pass filter unit 1 and switch control unit 2,
[0044] The Icp signal input end of the second-order switch low-pass filter unit 1 is connected to the Icp signal output end of the previous stage structure charge pump 11, and the Vctrl1 signal input end of the second-order switch low-pass filter unit 1 is connected to the Vctrl1 signal of the switch control unit 2 output, second-order switching low-pass filter unit 1 The signal input terminal is connected to the switch control unit 2 signal output,
[0045] The UP signal output terminal of the frequency and phase detector is used as the UP signal input terminal of the switch control unit 2,
[0046] The DW signal output terminal of the frequency and phase detector is used as the DW si...
specific Embodiment approach 2
[0048] Specific implementation mode two: refer to Figure 7 Describe this embodiment in detail. This embodiment is a further description of the second-order switch low-pass filter in the charge pump phase-locked loop described in the first embodiment. In this embodiment, the second-order switch low-pass filter unit 1 includes CMOS switch 3, resistor R1, capacitor C1 and capacitor C2,
[0049] The switch control unit 2 includes a pulse width identification unit 7, a NAND gate 8, a NOR gate 9 and an inverter 10,
[0050] The Icp signal output end of the charge pump 11 in the previous stage structure is connected to one end of the resistor R1 and a signal input end of the CMOS switch 3 at the same time, the other end of the resistor R1 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is connected to the power ground.
[0051] The Vctrl signal output end of the CMOS switch 3 is connected to one end of the capacitor C2, and the other end of the ca...
specific Embodiment approach 3
[0057] Specific implementation mode three: refer to Figure 7 This embodiment is described in detail. This embodiment is a further description of the second-order switch low-pass filter in the charge pump phase-locked loop described in the first embodiment. In this embodiment, the charge pump (11) includes a No. 1 voltage Source U1, No. 2 voltage source U2, No. 1 switch K1 and No. 2 switch K2,
[0058] The positive pole of the No. 1 voltage source U1 is connected to the power supply, the negative pole of the No. 1 voltage source U1 is connected to one end of the No. 1 switch K1, the other end of the No. 1 switch K1 is connected to one end of the No. 2 switch K2, and the other end of the No. 2 switch K2 is connected to The positive pole of the second voltage source U2, the control terminal of the first switch K1 is connected to the UP signal input terminal of the frequency and phase detector, and the control terminal of the second switch K2 is connected to the DW signal input t...
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