Unlock instant, AI-driven research and patent intelligence for your innovation.

A kind of nmosfet device and preparation method thereof

A device and substrate technology, which is applied in the field of NMOSFET devices and their preparation, can solve the problems that the carrier mobility cannot be further improved and the device performance is large, and achieve the effect of improving the carrier mobility and improving the performance.

Active Publication Date: 2018-03-06
SEMICON MFG INT (SHANGHAI) CORP +1
View PDF8 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] With the shrinking of CMOS process nodes, it is more and more difficult to improve device performance. At present, the performance of devices is mainly improved by improving the carrier mobility (mobility) of MOS devices, such as strained silicon (strain silicon) technology. Improve the mobility of carriers in MOS devices; specifically, a compressive stress layer (such as SiGe) can be set on the PMOS device structure, and a tensile stress layer (such as SiC) can be set on the NMOS device structure to improve the load capacity of the MOS device. The mobility of carriers; however, the ability of the above-mentioned process to increase the speed of carriers has been applied to the limit, and the mobility of carriers cannot be further improved

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A kind of nmosfet device and preparation method thereof
  • A kind of nmosfet device and preparation method thereof
  • A kind of nmosfet device and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

preparation example Construction

[0050] Figure 2-18 It is a schematic flow chart of an embodiment of the preparation method of the NMOSFET device of the present application; as Figure 2-18 As shown, a method for preparing an NMOSFET device in the present application can be applied to low-power applications of 20nm and below technology nodes, and the method includes:

[0051] First, if figure 2 As shown, a substrate 21 (such as an NFET substrate, etc.) provided with a shallow trench isolation structure 22 is provided, and a gate oxide film 23 and a sample gate layer 24 are sequentially deposited on the surface of the substrate 21. process (Gate Etch) to remove part of the gate oxide film 23 and part of the sample gate layer 24 to form a image 3 The shown gate stack structure is composed of a sample gate oxide layer (that is, a sample gate dielectric layer) 231 and a sample gate 241; where the remaining gate oxide film is etched to form the sample gate oxide layer 231, and the remaining sample gate layer ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to the technical field of semiconductor manufacturing, and particularly relates to an NMOSFET device and a preparation method thereof. Before an offset spacer preparation technology, an amorphous silicon region is formed in a substrate by pre-amorphous implantation. After a light doping technology, a stack fault is formed in the amorphous silicon region in the heat treatment process of a stress memory technology. Moreover, a recessed U-shaped stress structure is formed in a source / drain region to further improve the carrier mobility of a prepared NMOSFET device and improve the performance of the device.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to an NMOSFET device and a preparation method thereof. Background technique [0002] With the shrinking of CMOS process nodes, it is more and more difficult to improve device performance. At present, the performance of devices is mainly improved by improving the carrier mobility (mobility) of MOS devices, such as strained silicon (strain silicon) technology. Improve the mobility of carriers in MOS devices; specifically, a compressive stress layer (such as SiGe) can be set on the PMOS device structure, and a tensile stress layer (such as SiC) can be set on the NMOS device structure to improve the load capacity of the MOS device. The mobility of the carriers; however, the ability of the above-mentioned process to increase the velocity of the carriers has been applied to the limit, and the mobility of the carriers cannot be further improved. Contents of the invent...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/08H01L29/32H01L21/336
CPCH01L29/08H01L29/32H01L29/66477H01L29/78H01L29/7842
Inventor 李勇肖德元
Owner SEMICON MFG INT (SHANGHAI) CORP