SPI (Serial Peripheral Interface) controller and communication method for SPI controller

Abstract

The invention discloses an SPI (Serial Peripheral Interface) controller. The controller comprises an interface module (1), a register set module (2), a clock division module (3), a data transmission buffer (4), a data reception buffer (5), a delay transmission module (6), a transmission / reception control logic module (7) and an interruption generation module (8). In addition, the invention discloses a communication method by utilization of the SPI controller. The SPI controller and the communication method by utilization of the SPI controller have the advantages that a delay transmission control function can be realized, the high-speed performance of interface operation is guaranteed, and the requirements of a low-speed interface device on operation time sequence are also met.

Description

technical field [0001] The invention relates to a peripheral serial bus SPI interface, in particular to an SPI controller and a communication method realized by the controller. Background technique [0002] With the development of VLSI, the design of SOC (System on Chip, system-on-chip) becomes more and more complicated. IP core (Intellectual Property core) is a hardware description language program with specific circuit functions. This program has nothing to do with the integrated circuit process and can be transplanted to different semiconductor processes to produce integrated circuit chips. The IP core has a standardized interface protocol, good portability and testability, and provides a reliable guarantee for system development. It is of great significance to study IP multiplexing technology. [0003] The SPI interface is a synchronous serial interface technology introduced by Motorola. SPI has obvious advantages such as simple structure and fast communication speed,...

AI Technical Summary

Problems solved by technology

However, the current SPI interface design is not flexible enough. First, when the transmission speed of the interface is slower than that of the CPU, the operation timing of the interface and the CPU will be inconsistent, resulting in a relatively narrow scope of application of the SPI interface. Second, it is easy to appear in the communication process. Misplacement and loss of data transmission errors, the obtained data is not the actual required data

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