MOS transistor and forming method thereof

Abstract

Disclosed are a MOS transistor and a forming method thereof. The forming method of the MOS transistor includes the following steps: providing a semiconductor substrate; forming a grid electrode structure on the semiconductor substrate, wherein the grid electrode structure includes a gate dielectric layer on the surface of the semiconductor substrate and a grid electrode on the surface of the gate electric layer, part of the semiconductor substrate, beneath the grid electrode structure, is used as a channel area; carrying out ion implantation in part of the semiconductor substrate, at one side of the grid electrode structure so that a pocket area is formed; forming a source electrode and a drain electrode in parts of semiconductor substrate, at the two sides of the grid electrode structure so that the pocket area is between the source electrode and the channel area, wherein the type of doped ions of the source electrode and the drain electrode is opposite to the type of doped ions in the pocket area. The method is capable of reducing a hot carrier effect of the MOS transistor so that the performance of the transistor is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a MOS transistor and a forming method thereof. Background technique [0002] Metal-oxide-semiconductor (MOS) transistors are the most basic components in semiconductor manufacturing and are widely used in various integrated circuits. The MOS transistor generally has a symmetrical structure, mainly including: a gate structure located on the surface of the semiconductor substrate, and a source and a drain located in the semiconductor substrate on both sides of the gate structure. The source and drain are formed by high doping, which can be divided into N-type doping (NMOS) and P-type doping (PMOS) according to different device types. [0003] With the development of integrated circuits to ultra-large scale integrated circuits, the circuit density inside integrated circuits is increasing, and the number of components contained is also increasing, and the size of semiconducto...

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Problems solved by technology

The hot carrier effect will increase the threshold voltage of NMOS transistors, reduce the threshold voltage of PMOS transistors, degrade the performance of semiconductor devices, and affect the reliability of long-term operation

[0004] Therefore, the performance of the existing MOS transistors needs to be further improved

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