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Method for reducing processor load in server and server structure

A server and processor technology, applied in the field of server structure, can solve the problems of server processor performance and power consumption waste, and achieve the effect of reducing power consumption and improving energy efficiency ratio

Active Publication Date: 2018-02-27
SHANGHAI XINCHU INTEGRATED CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this method is that when the processor or microprocessor in the storage network preprocesses the original data and imports it into the system memory, it is inevitable to enable the server processor to process the preprocessed data in the storage network. These tasks It is also lightweight for server processors and does not require a lot of ALU participation. That is to say, enabling server processors at this time is also a waste of performance and power consumption.

Method used

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  • Method for reducing processor load in server and server structure
  • Method for reducing processor load in server and server structure
  • Method for reducing processor load in server and server structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0043] The present invention provides a server structure, such as Figure 4AAs shown, all of them use multi-chip packaging technology (MCP) to package the processor chip, off-chip volatile memory, and 3D new non-volatile memory in the same package. The off-chip volatile memory can be used as a volatile part of the processor's off-chip last-level cache, and its composition can be an embedded dynamic random access memory (eDRAM). Part or all of the off-chip volatile memory replaces part or all of the traditional system memory or the volatile part of the hybrid memory. The 3D new non-volatile memory can be a 3D phase-change memory (3D PCM) whose technology is gradually maturing, or other 3D new non-volatile memories, such as 3D magnetic memory or 3D resistive memory or 3D ferroelectric memory , using a 3D vertical stacking process. The 3D new non-volatile memory can be used as the non-volatile part of the processor's off-chip last-level cache, and part or all of it replaces par...

Embodiment 2

[0048] According to a server structure proposed in Embodiment 1, this embodiment proposes a method for reducing the processor load in the server, such as Figure 7 As shown, the method specifically includes steps:

[0049] S1: The server responds to the customer's application request, and the system judges whether the customer's data or application program is stored in the 3D new non-volatile memory, if yes, skip to S2; if not, skip to S3;

[0050] S2: The lightweight processor in the 3D new non-volatile memory directly responds to customer requests and executes the application program stored in the 3D new non-volatile memory, and returns the processing result to the customer after execution, according to different customers Depending on the needs of the application, it may be necessary to further access the storage network to obtain more data or applications, jumping into S5;

[0051] S3: The system requests user applications and data from the storage network. If query or in...

Embodiment 3

[0065] According to the method for reducing processor load in the processor and the server structure provided in the above embodiments, the present invention proposes a specific application of the server structure.

[0066] In traditional client applications, the server processor needs to keep working to continuously process different client applications. Whether it is a heavyweight application that requires a lot of ALU participation or a lightweight application that does not require a lot of ALU participation, the processor is in an effective state, such as Figure 9A As shown in the state of the processor, the power consumption of the whole process system is very high, and the energy efficiency ratio is also very low. And apply this method of reducing the server processor of the present invention, when the load of the server processor is low, the client application of its processing generally all is the lightweight application that does not need ALU to participate in a large...

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Abstract

The invention provides a method for reducing the processor load in the server. The server responds to the client's application request and judges whether the data and / or application program required by the client are stored in the 3D new non-volatile memory. The magnitude processor responds to the application request and executes the application program stored in the 3D non-volatile memory and / or invokes data execution; otherwise, the server requests data and / or application program from the storage network and imports it from the storage network To the server's memory, off-chip cache, on-chip high-speed memory, the lightweight processor processes or executes the data and / or applications returned by the storage network; finally returns the processing results to the client after execution. Take advantage of the lightweight processor in 3D's new non-volatile memory to handle lightweight applications and improve productivity.

Description

technical field [0001] The invention relates to the field of server structure, in particular to a method for reducing processor load in the server and the server structure. Background technique [0002] A data center is a complex set of facilities that includes not only computer systems and other supporting equipment (such as communication and storage systems), but also redundant data communication connections, environmental control equipment, monitoring equipment, and various security devices . The main purpose of a data center is to run applications to process business and operational data of the organization. In data processing, it is divided into two categories: one is transaction processing, and the other is data query and analysis. Data processing or analysis is generally processed in a database, and data query is divided into two categories, one is database query, and the other is search technology. Simplified data center structure such as figure 1 As shown, it is...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/32G06F9/50
Inventor 景蔚亮
Owner SHANGHAI XINCHU INTEGRATED CIRCUIT
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