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Method of forming CMOS well with mask saved

A photomask and substrate technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., to achieve the effect of saving photomasks, saving costs, and less CMOS process changes

Active Publication Date: 2015-11-18
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Abstract
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Problems solved by technology

The cost of the mask (Mask) often occupies a large part of the final cost of the product

Method used

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  • Method of forming CMOS well with mask saved
  • Method of forming CMOS well with mask saved
  • Method of forming CMOS well with mask saved

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Embodiment Construction

[0024] The specific embodiment of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0025] It should be noted that, in the following specific embodiments, when describing the embodiments of the present invention in detail, in order to clearly show the structure of the present invention for the convenience of description, the structures in the drawings are not drawn according to the general scale, and are drawn Partial magnification, deformation and simplification are included, therefore, it should be avoided to be interpreted as a limitation of the present invention.

[0026] In the following specific embodiments of the present invention, please refer to figure 1 , figure 1 It is a flow chart of a CMOS well forming method that saves photomasks in the present invention; at the same time, please refer to Figure 2 to Figure 5 , Figure 2 to Figure 5 is an embodiment of the present invention according to figure 1 ...

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Abstract

The invention discloses a method of forming a CMOS well with a mask saved. After exposure and ion implantation on a P-type or an N-type second well are completed, inert ion implantation is further added, the surface of the P-type or the N-type well is in an amorphous state, and implantation of follow-up reversed-type ions can be effectively blocked; then, with the help of a dual-gate mask, implantation on an N-type or a P-type first well is carried out, and as the second well region is protected by the amorphous layer, the second well region is little influenced and the influence can be adjusted back through improving the ion implantation concentration of the second well; and finally, a well annealing process in the traditional technology is used for restoring the amorphous layer on the surface of the second well. The method makes few changes on the CMOS process and is compatible with the traditional technology, the mask can be saved, and the purpose of saving the cost can be finally achieved.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit microelectronics, and more specifically relates to a method for saving photomasks by increasing the implantation of inert ions when forming a CMOS well. Background technique [0002] The CMOS device is a complementary structure formed by NMOS and PMOS transistors, which has many advantages such as low power consumption, high speed, strong anti-interference ability, and high integration. At present, the CMOS process has become the mainstream process technology of large-scale integrated circuits. [0003] CMOS circuits include both NMOS transistors and PMOS transistors. NMOS transistors are made on a P-type silicon substrate, while PMOS transistors are made on an N-type silicon substrate. To make these two kinds of transistors on the same substrate, it is necessary to make an inversion region on the substrate, which is called a "well". According to different wells, the CMO...

Claims

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Application Information

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IPC IPC(8): H01L21/8238
CPCH01L21/823892
Inventor 沈萍黄奕仙曹亚民
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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