Chip packaging structure and manufacture method thereof, and chip packaging substrate

Abstract

A manufacturing method of a chip packaging structure comprises the steps that a loading plate is provided, a first conductive line layer, a first dielectric layer and a second conductive line layer are successively formed at one side at least of the loading plate, and the first conductive line layer is connected with the second conductive line layer via first conductive poles; a second dielectric layer is formed at one side, far from the loading plate, of the second conductive line layer, openings of the second dielectric layer are formed in the second conductive dielectric layer, and form second conductive poles via electroplating, the second conductive line layer is electrically connected with the second conductive poles, and the surfaces, far from the first dielectric layer, of the second conductive poles are approximately leveled with the surface, far from the first dielectric layer, of the second dielectric layer; and the loading plate is removed, and a chip is welded to form the chip packaging structure. The invention also relates to a chip packaging substrate and structure.

Description

technical field [0001] The invention relates to the field of circuit board manufacturing, in particular to a chip packaging structure, a manufacturing method and a chip packaging substrate. Background technique [0002] The chip packaging substrate can provide the chip with electrical connection, protection, support, heat dissipation, assembly and other functions to achieve multi-pin, reduce the size of packaged products, improve electrical performance and heat dissipation, ultra-high density or multi-chip modularization. Generally, the chip packaging substrate forms an opening in the solder resist layer on the side where the chip is placed, so as to expose the solder pads, so that solder balls can be formed on the surface of the solder pads and soldered to the chip. Under the demand of high-density wiring, the line is getting thinner and thinner, and the opening of the solder mask is getting smaller and smaller, so the size of the pad defined by the opening of the solder ma...

AI Technical Summary

Problems solved by technology

Under the demand of high-density wiring, the line is getting thinner and thinner, and the opening of the solder mask is getting smaller and smaller, so the size of the pad defined by the opening of the solder mask is getting smaller and smaller, so that poor soldering occurs frequently. On the one hand, solder balls are not easy to fill into the opening of the solder mask, which will cause empty soldering. On the other hand, the diameter of the solder ball becomes smaller as the size of the solder mask opening becomes smaller, so that the soldering height is insufficient, resulting in a gap between the chip and the package substrate. The distance is not enough, it is difficult to fill the encapsulant, which leads to the fact that the chip cannot be firmly packaged on the package substrate

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