Method for forming embedded silicon germanium source/drain structure

Abstract

The present application discloses a method for forming an embedded SiGe source / drain structure. The method includes: providing a front-end device structure, the front-end device structure including a semiconductor substrate and a gate structure located on the semiconductor substrate; forming an oxide layer on the surface of the front-end device structure; forming a silicon nitride film on the surface of the oxide layer , wherein there are sidewalls including an oxide layer and a silicon nitride film on both sides of the gate structure; a photolithography process is performed to define the positions of the source and drain; an etching process is performed to form the source and the drain in the semiconductor substrate A recessed region is formed at the position of the drain, wherein the oxide layer is nitridated to form a silicon oxynitride capping layer during the etching process or after the etching process is completed; the embedded silicon germanium is epitaxially grown in the recessed area; The source and drain are formed by ion implantation based on silicon germanium.

Description

technical field [0001] The present invention generally relates to a semiconductor manufacturing process, and in particular to a method for forming an embedded germanium-silicon source / drain structure. Background technique [0002] At present, the main factor affecting the performance of field effect transistors is the mobility of carriers, where the mobility of carriers will affect the magnitude of the current in the channel. The reduction in carrier mobility in field-effect transistors not only reduces the switching speed of the transistor, but also reduces the difference in resistance between on and off. Therefore, in the development of complementary metal-oxide-semiconductor field-effect transistors (CMOS), effectively improving carrier mobility has always been one of the key points in transistor structure design. [0003] Conventionally, P-type metal-oxide-semiconductor field-effect transistors (PMOS) and N-type metal-oxide-semiconductor field-effect transistors (NMOS) ...

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Problems solved by technology

[0020] However, during the epitaxial growth of SiGe, due to the poor eSiGe selectivity of the chemical vapor deposition (CVD) oxide layer and poor surface morphology, defects such as protrusions are easily formed on the shoulders of the polysilicon layer.

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