Trench MOSFET with double tube cores and production method of Trench MOSFET

A processing method and dual-die technology, applied in the direction of transistors, electrical components, electric solid-state devices, etc., can solve the problems of TrenchMOSFET with large area, and achieve the effect of increasing the number of effective dies, reducing the area, and reducing the cost

Active Publication Date: 2015-12-30
FUJIAN FUXIN ELECTRONICS TECH CO LTD
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Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a TrenchMOSFET with a dual-tube core and a processing method thereof, so as to solve the problem that the area of ​​the existing dual-tube-core TrenchMOSFET is large

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  • Trench MOSFET with double tube cores and production method of Trench MOSFET
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  • Trench MOSFET with double tube cores and production method of Trench MOSFET

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Embodiment Construction

[0023] In order to describe the technical content, structural features, achieved goals and effects of the present invention in detail, the following will be described in detail in conjunction with the embodiments and accompanying drawings.

[0024] see Figure 2 to Figure 6 , The present invention provides a dual-die Trench MOSFET, wherein the MOSFET is a metal-oxide semiconductor field-effect transistor, referred to as a metal-oxide-semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET). Including an N+ substrate layer 1, an N- epitaxial layer 2 is arranged on the N+ substrate layer, a first P-body layer 7 is arranged on the upper left part of the N- epitaxial layer, and a second P-body layer 17 is arranged on the upper right part of the N- epitaxial layer, Between the first P-body layer and the second P-body layer is a continuous N-epitaxial layer, that is, there is no P-body layer between the first P-body layer and the second P-bod...

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Abstract

The invention provides a Trench MOSFET with double tube cores and a production method of the Trench MOSFET. The Trench MOSFET comprises an N+ substrate layer, wherein an N- epilayer is arranged on the N+ substrate layer; a first P-body layer is arranged at the left upper part of the N- epilayer; a second P-body layer is arranged at the right upper part of the N- epilayer; the continuous N- epilayer is arranged between the first P-body layer and the second P-body layer; a first Trench groove is formed in the first P-body layer; a second Trench groove is formed in the second P-body layer; the first Trench groove penetrates through the first P-body layer; the second Trench groove penetrates through the second P-body layer; Poly structures are arranged in the first Trench groove and the second Trench groove. According to the invention, the independent Ring structure of two MOSFETs are combined into one Ring structure, so that under the premise that the performance of the product is not impacted, the area of a single MOS is reduced, the effective tube core number of a single MOSFET is increased, and the cost is reduced.

Description

technical field [0001] The invention relates to the field of transistors, in particular to a double tube-core TrenchMOSFET and a processing method thereof. Background technique [0002] An existing low-voltage Trench (trench) MOSFET product consists of two parts, the Cell area (primary cell area) in the central area and the Ring area (voltage resistance area) around it. The Cell area mainly plays the role of current conduction, and the Ring area The area is mainly to increase the breakdown voltage of the product. The Cell area is the current path when the device is turned on, and the Ring area around the cell area is used to increase the lateral breakdown voltage of the device. [0003] In order to reduce the packaging cost of some low-voltage TrenchMOSFET products, it is usually necessary to package two TrenchMOSFET tubes together, and the two MOSFETs can be controlled separately, so when designing the layout of the low-voltage TrenchMOSFET, usually two MOS tubes are placed...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02H01L27/088H01L21/8234
Inventor 胡兴正陈虞平王熹伟刘海波孙晓儒
Owner FUJIAN FUXIN ELECTRONICS TECH CO LTD
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