Intelligent traffic vehicle communication system with data first-in first-out function
An intelligent transportation, first-in-first-out technology, applied in the field of intelligent transportation vehicle communication system, can solve the problem of poor actual experience of cloud intelligent transportation service and wireless technology, poor continuity of data transmission of central control processor, small range of information collection of anti-collision system, etc. Problems, achieve the effect of improving communication efficiency, improving continuity and stability, and high stability
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Embodiment 1
[0025] figure 2 It is a schematic diagram of an embodiment of the visible light short-range signal transceiver of the present invention, and the optical fiber link includes a signal transmitting path and a signal receiving path.
Embodiment 2
[0027] Field programmable logic gate module 17: output at least two electrical signals, and the rate of each electrical signal is at least greater than 1 Gbps / s. Signal transmission path, including the first equalizer 1a: connect the field programmable logic gate module 17 through the ultra-high-speed Ethernet interface XLAUI, and receive the electrical signal; CDR & deserializer 2: receive the electrical signal compensated by the first equalizer 1a, and perform Clock and data recovery and deserialization; phase compensator 3: receive the electrical signal of CDR & deserializer 2, and perform phase fitting between dynamic and static electrical signals; serializer 4: receive the electrical signal fitted by phase compensator 3 Signal, output serial electrical signal; de-emphasis driver 5: receive the electrical signal of serializer 4, perform de-emphasis and amplification operation, and output electrical signal; ASIC6: connect de-emphasis driver 5 through physical medium associat...
Embodiment 3
[0029] The signal receiving path includes ASIC6: receiving the electrical signal uploaded by the photoelectric communication device LFC; the second equalizer 1a: receiving the electrical signal sent by the ASIC corresponding to the first equalizer 1a in the signal transmitting path; CDR7: receiving the second equalizer 1a after compensation Electrical signal for clock and data recovery; multiplexer 8: receive the electrical signal recovered by CDR7, output at least two half-speed electrical signals; de-emphasis driver 9: receive half-speed electrical signal of multiplexer 8 , to perform de-emphasis and amplification operations. The field programmable logic gate module 17 is connected to the de-emphasis driver 9 through the ultra-high-speed Ethernet interface XLAUI, and receives at least two half-speed electrical signals.
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