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Method for controlling fin size of fin field effect transistor device

A fin-type field effect and transistor technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as low efficiency, waste, and difficult control, so as to avoid waste, increase density, and efficiently correct or control Effect

Active Publication Date: 2018-01-02
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In the above process, the size of Fin is determined by the above process steps such as photolithography (exposure dose, etc.) In the stage of research and development or production, it is relatively difficult to control
If the process steps such as lithography and etching fluctuate, the size of Fin will be directly affected. If the impact occurs after lithography, the photoresist needs to be removed and re-exposed. If the impact occurs after etching , then the product needs to be scrapped. Therefore, the above-mentioned method of modifying or controlling the size of Fin is too inefficient and may cause waste

Method used

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  • Method for controlling fin size of fin field effect transistor device
  • Method for controlling fin size of fin field effect transistor device
  • Method for controlling fin size of fin field effect transistor device

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Embodiment Construction

[0033] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0034] In the following description, many specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways than those described here, so the present invention is not limited by the specific embodiments disclosed below.

[0035] Secondly, the present invention is described in detail in conjunction with schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the sectional view showing the structure of the device will not be partially enlarged according to the general scale, and the schematic diagram is only an example, and it should not be limited here. The protection scope of the present in...

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Abstract

The present application discloses a method for controlling the fin size of a fin field effect transistor device. The method includes: providing a substrate; forming fins Fin on the substrate; measuring the critical dimensions of the Fin; searching for different pre-acquired annealing methods according to the difference between the critical dimensions of the Fin and the specification requirements of the Fin The amount of silicon consumed by the process determines the annealing process for the Fin on the substrate; anneals the Fin on the substrate according to the determined annealing process. The method avoids the problem of repeated photolithography or product scrapping caused by the size of the Fin not meeting the specifications, and can efficiently correct or control the size of the Fin, avoiding waste.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing technology, in particular to a method for controlling the fin size of a fin field effect transistor device. Background technique [0002] Fin Field-Effect Transistor (FinFET) is a new type of multi-gate 3D transistor. Compared with traditional planar transistors, FinFET devices can provide more significant advantages in power consumption and performance. [0003] Since the width of Fin is very small, the width of 14 / 16nm devices is generally about 10nm. It is difficult to control the photolithography and etching with the current lithography equipment. At present, the more common process for forming Fin (fin) is Align the second pattern exposure (self-aligned double-pattering, SADP) process. The steps of forming Fin through the SADP process generally include: the first step, performing thin film deposition, photolithography, and etching on the substrate 11 to form suc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336
Inventor 徐强熊文娟张永奎殷华湘
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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