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Three-dimensional high-value integrated capacitor based on through-silicon hole array and its manufacturing method

A technology for integrating capacitors and manufacturing methods, which is applied in the direction of electric solid devices, circuits, electrical components, etc., can solve the problems of small capacitance value of plate capacitors, and achieve the effect of improving the capacitance value.

Inactive Publication Date: 2017-11-28
XIAN UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to provide a three-dimensional high-value integrated capacitor based on a through-silicon via array, which can greatly increase the capacitance of the integrated capacitor and solve the problem of small capacitance of the two-dimensional structure of the plate capacitor in the prior art

Method used

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  • Three-dimensional high-value integrated capacitor based on through-silicon hole array and its manufacturing method
  • Three-dimensional high-value integrated capacitor based on through-silicon hole array and its manufacturing method
  • Three-dimensional high-value integrated capacitor based on through-silicon hole array and its manufacturing method

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Effect test

Embodiment 1

[0051] Step 1. Etching several through holes penetrating the upper and lower surfaces of the semiconductor substrate 201 on the semiconductor substrate 201 by means of reactive ions. The thickness of the semiconductor substrate 201 is 50 microns, and the diameter of the through holes is 3 microns. The holes are arranged in a square matrix of five rows and five columns on the surface of the semiconductor substrate 201; wherein, the reaction gas used for etching is fluoride or chloride gas, the pressure of the reaction gas is 15 Pascal, and the flow rate of the reaction gas is 10 ml / min , the RF power range is 200 watts, and the etching temperature is 150°C;

[0052] Step 2. Prepare the insulating layer 202 on the inner surface of the through hole described in step 1 by chemical vapor deposition; wherein, the deposition temperature of the chemical vapor deposition method is 300° C., the radio frequency power is 400 watts, and the reaction gas flow rate is 200 ml / min, the plasma ...

Embodiment 2

[0060] Step 1. Etching several through holes penetrating the upper and lower surfaces of the semiconductor substrate 201 on the semiconductor substrate 201 by means of reactive ions. The thickness of the semiconductor substrate 201 is 100 microns, and the diameter of the through holes is 6 microns. The holes are arranged in a square matrix of six rows and six columns on the surface of the semiconductor substrate 201; wherein, the reaction gas used for etching is fluoride or chloride gas, the pressure of the reaction gas is 20 pascals, and the flow rate of the reaction gas is 25 ml / minutes, the RF power range is 260 watts, and the etching temperature is 150°C;

[0061] Step 2. Prepare the insulating layer 202 on the inner surface of the through hole described in step 1 by chemical vapor deposition; wherein, the deposition temperature of the chemical vapor deposition method is 350° C., the radio frequency power is 500 watts, and the reaction gas flow rate is 250 mL / min, the pla...

Embodiment 3

[0069] Step 1. On the semiconductor substrate 201, etch several through holes penetrating the upper and lower surfaces of the semiconductor substrate 201 by means of reactive ions. The thickness of the semiconductor substrate 201 is 200 microns, and the diameter of the through holes is 10 microns. The holes are arranged in a square matrix with seven rows and seven columns on the surface of the semiconductor substrate 201; wherein, the reaction gas used for etching is fluoride or chloride gas, the pressure of the reaction gas is 30 Pascals, and the flow rate of the reaction gas is 40 ml / minutes, the RF power range is 350 watts, and the etching temperature is 150°C;

[0070] Step 2. Prepare the insulating layer 202 on the inner surface of the through hole described in step 1 by chemical vapor deposition; wherein, the deposition temperature of the chemical vapor deposition method is 400° C., the radio frequency power is 550 watts, and the reaction gas flow rate is 300 mL / min, th...

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Abstract

The invention discloses a three-dimensional high-value integrated capacitor based on a through-silicon hole array. The insulating layer is filled with TSV metal; the upper surface of the semiconductor substrate is provided with a top layer dielectric, and the lower surface of the semiconductor substrate is provided with a bottom layer dielectric; the TSV metal is divided into two groups, of which the first group of TSV The hole metals are connected to each other to form electrode 1, and the second group of TSV metals are connected to each other to form electrode 2; one of electrode 1 and electrode 2 is the positive electrode of the capacitor, and the other is the negative electrode of the capacitor. The invention also discloses a manufacturing method of the three-dimensional high-value integrated capacitor based on the through-silicon hole array. The invention utilizes the parasitic capacitance between the through-silicon hole metal and the silicon substrate to greatly increase the capacitance of the integrated capacitor and solve the problem of the small capacitance of the two-dimensional structure plate capacitance in the prior art.

Description

technical field [0001] The invention belongs to the technical field of microelectronic devices, and in particular relates to a three-dimensional high-value integrated capacitor based on a through-silicon hole array, and also relates to a manufacturing method of the capacitor. Background technique [0002] Capacitors are one of the three major passive devices and are an important part of various circuits in modern communication systems. They are widely used in analog, analog-digital hybrid, radio frequency and microwave integrated circuits, and can be used to achieve functions such as filtering and compensation. Conventional integrated capacitors are implemented by adding a layer of dielectric between conductors. For example, a polysilicon layer deposited on a silicon substrate can act as capacitor plates, and an oxide layer between the plates acts as a dielectric. In addition, the metal interconnect layers of integrated circuits can also be used to form capacitors. These ca...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/64
Inventor 王凤娟余宁梅
Owner XIAN UNIV OF TECH
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