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Tuber resistance imaging data acquisition system based on FPGA

A technology for imaging data and acquiring systems, applied in the direction of material resistance, etc., can solve problems such as slow execution speed, unsuitable for fast calculation of large amounts of data, etc., and achieve the effect of good product performance and strong flexibility

Inactive Publication Date: 2016-03-16
BEIJING JIAOTONG UNIV
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Problems solved by technology

Although the ARM core processing chip scheme has a short development cycle and has relatively strong transaction management functions, its execution speed is slow and it is not suitable for fast calculation of large amounts of data. It is not very good when applied to the data acquisition system in the TERT system. Meet the requirements of TERT system for data collection

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  • Tuber resistance imaging data acquisition system based on FPGA
  • Tuber resistance imaging data acquisition system based on FPGA
  • Tuber resistance imaging data acquisition system based on FPGA

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Embodiment Construction

[0031] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0032] In order to solve the defects of the traditional single-chip embedded technology solution, the present invention designs an FPGA-based tuber resistance imaging data acquisition system to realize high-speed real-time measurement of 6×104 output voltage data of 6×16 array electrodes in the TERT system . Mainly through the FPGA chip to control the hardware circuit and chip, the excitation and signal acquisition of the 6-layer planar array electrodes in the TERT system are swept and controlled, so as to realize the acquisition of the TERT system data.

[0033] Such as figure 1 As shown, the FPGA-based tuber resistance imaging data acquisition system of the present invention specifically includes:

[0034] The signal excitation part includes the FPGA chip, the excitation constant current source and the excitation channel selection unit. The signal excitat...

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Abstract

The present invention relates to a tuber resistance imaging data acquisition system based on FPGA. An FPGA chip is used for controlling hardware circuit and chips, and conducts sweeping control on excitation and signal acquisition of 6 layers of planar array electrode in a TERT system, in order to achieve data acquisition of TERT system. The tuber resistance imaging data acquisition system based on FPGA uses the FPGA chip scheme for data collection; because of its strong flexibility, the FPGA can be programmed by HDL language to achieve different functions. The developed product has excellent characteristics good performance and motile peripheral scalable I / Os, and can achieve high-speed acquisition of a large amount of data, so that the data acquisition system can well meet the requirements of TERT system for data acquisition.

Description

technical field [0001] The present invention relates to the data acquisition technology that is applied to TERT (tuber electrical resistance tomography, Tuber Electrical Resistance Tomography) system, specifically is based on the tuber electrical resistance imaging data acquisition system of FPGA (field programmable gate array, Field Programmable Gate Array). The data acquisition system refers in particular to a data acquisition system used in the TERT system. Background technique [0002] For the existing TERT system, it can be divided into two parts: the data acquisition system (data acquisition and transmission) and the image reconstruction system (imaging algorithm). If you want to obtain accurate images that meet the needs of specific occasions, a reasonable incentive for the TERT system / Measurement and precise signal acquisition are especially important. [0003] In the prior art, reasonable excitation / measurement and accurate signal acquisition of the TERT system ar...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01N27/04
CPCG01N27/04
Inventor 邓湘刘澍嶷蒋自立唐宇
Owner BEIJING JIAOTONG UNIV
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