Method for inversion from electrical property of vertical interconnection structure to process parameter thereof

Abstract

The invention provides a method for inversion from an electrical property of a vertical interconnection structure to a process parameter thereof. The method comprises: using a transmission resonance frequency of the vertical interconnection structure and a corresponding S11 value as electrical parameter input values, and using an inter-layer dislocation of the vertical interconnection structure as output, to establish a prediction model of inversion from the electrical property to a structure; then using an inter-layer dislocation value of the interconnection structure as input, and using a sintering process parameter as output, to establish a prediction model of inversion from a structural dislocation to the process parameter, wherein the inversion method uses an multi-core support vector machine algorithm integrating prior knowledge, so as to obtain an accurate prediction model with a small sample by training; and successively inputting an electrical property index of the interconnection structure into the foregoing two inversion models, to predict the process parameter that needs be set when processing the vertical interconnection structure. The inversion method provided by the invention can improve the process parameter of the designed vertical interconnection structure, so as to ensure that the final vertical interconnection structure can meet requirements of the electrical property index.

Description

technical field [0001] The invention belongs to the technical field of vertical interconnection of electronic packaging, and in particular relates to an inversion method from the electrical properties of a vertical interconnection structure to its processing parameters, which can be used to design the processing parameters of the vertical interconnection structure to improve its electrical properties. Background technique [0002] With the development trend of miniaturization of electronic products, the vertical interconnection structure, as a typical high-density three-dimensional packaging structure, is more and more widely used in modern electronic products. Most of the implementation forms of the vertical interconnection structure are based on LTCC (low temperature co-fired ceramic) packaging technology, and its processing process is as follows: figure 1 As shown, it mainly includes the production of through holes, through hole metallization, stack correction, lamination...

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Problems solved by technology

There are three main factors in the above processing process that cause dislocation

First of all, during the lamination correction process, due to the limited positioning accuracy of the lamination equipment, it will inevitably lead to misalignment of the lamination between layers; secondly, in the lamination process, due to the unevenness of the structure, the force will be uneven, which will cause Dislocation between layers; Finally, in the sintering process, the organic solvent in the green ceramic sheet will volatilize, which will cause the green ceramic sheet to sinter shrink, but the multilayer LTCC structure has different shrinkage rates due to the uneven structure. , eventually causing sintering dislocation defects in the vertical interconnect structure

Dislocation defects can seriously affect the electrical transport performance of vertical interconnect structures

[0003] At present, there are relationship models of the influence of process parameters on interconnection dislocation and the relationship model of the influence of interconnection structure dislocation on its electrical properties, but these models can only be used to positively evaluate the dislocation amount of vertical interconnection structure and its electrical transmission characteristics , but in practical applications, it is often necessary to design process parameters on the basis of known electrical performance indicators, so that the total dislocation of the final processed interconnection structure is limited within a certain range, so as to meet the required electrical indicators

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