A preparation method with controllable morphology of dry etching bumps

Abstract

The invention discloses a bumping appearance controllable preparation method based on dry etching, comprising the steps of: adhering an oxide layer dielectric film on a substrate; spin coating the oxide layer dielectric film with photoresist (PR), and performing exposure and development; baking the PR, allowing the PR to form a fixed appearance and thickness; employing RIE dry etching, and using a CF4 and CHF3 gas composition to etch the dielectric film; maintaining the gas total flow of CF4 and CHF3 not changed, and adjusting the proportion between CF4 and CHF3, thereby obtaining a certain selection ratio between oxide and PR; and through the selection ratio between oxide and PR, gradually consuming the PR of two shoulders under the condition of fixed PR appearance and thickness in a dielectric film etching process, thereby etching the dielectric film to form a regular trapezoid shape, and finally obtaining a bumping shape having a controllable bottom gradient appearance. The method is simple, and the prepared bumping has a controllable appearance, and great repeatability.

Description

technical field [0001] The invention relates to the field of wafer bump technology, in particular to a method for preparing a dry etching bump with controllable morphology. Background technique [0002] In recent years, with the great progress of semiconductor technology, the requirements for semiconductor technology have become more and more stringent, and the critical dimensions have been continuously reduced. The corresponding dimensional accuracy requirements must be strictly controlled within a certain range, thus increasing the difficulty of the process. In the semiconductor manufacturing process, photolithography and dry etching play two important roles. [0003] As an important semiconductor manufacturing technology, the Bumping process has already attracted people's attention, and it is widely used in packaging technology and the manufacture of various electronic devices and sensors. Due to its unique shape requirements and precision requirements in sensor applicat...

AI Technical Summary

Problems solved by technology

In the existing process technology, the annealing method after the photoresist PR is used to form a certain angle first. Under RIE dry etching, the PR will gradually be lost during the etching process, so the slope on both sides of the bump will be formed.

However, the post-PR annealing method has certain limitations. After the post-PR annealing, the bottom angle of the etched topography is determined. When the requirements for the topography angle are small, it is almost impossible to achieve it through PR annealing, and the requirements for the photoresist are also very high. Extremely harsh. In addition, after PR annealing, the uniformity of the entire wafer is poor, resulting in poor uniformity of the morphology after etching, and it is difficult to meet the process requirements.

[0004] The existing process mainly uses post-PR annealing method (PRreflow) to realize the bump etching morphology. The post-PR annealing method has certain limitations. After PR post-annealing, the bottom angle and upper critical dimension of the etched topography are determined. When the requirements for the shape angle are small, it is almost impossible to achieve through PR annealing, and the requirements for photoresist are also extremely strict. In addition, after PR annealing, the uniformity of the entire wafer is poor, resulting in uniform morphology after etching. Poor sex

For a design bump shape, this method requires a multi-step debugging process, long development cycle, high PR cost, time-consuming and laborious, and low efficiency

Images