Anti-fuse one-time programmable memory and its realization method
An implementation method and anti-fuse technology, applied in read-only memory, static memory, information storage, etc., can solve the problems of large memory structure area and reliability improvement, and achieve the effect of reducing area and improving stability
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no. 1 example
[0026] Please also refer to figure 2 , image 3 ; figure 2 It is a schematic diagram of the antifuse one-time programmable memory in the first embodiment of the present invention; image 3 It is an equivalent circuit diagram of an antifuse one-time programmable memory in an embodiment of the present invention;
[0027] Provide a semiconductor substrate (not labeled), form an implant region 100' in the semiconductor substrate, and form an active region 200' in the semiconductor substrate, and the gate 310' of the selection unit 300' vertically covers part of the active region 200', the extending direction of the gate 310' of the selection unit is the first direction. The gate 310' of the selection unit is formed with a second via hole 320' to electrically connect to the word line; the active region 200' is provided with a first via hole 330' near the gate 310' of the selection unit to electrically connect on the bit line. The two antifuse units are respectively the first...
no. 2 example
[0029] Please also refer to Figure 5 , image 3 ; Figure 5 It is a schematic diagram of the antifuse one-time programmable memory in the second embodiment of the present invention; image 3 It is an equivalent circuit diagram of an antifuse one-time programmable memory in an embodiment of the present invention;
[0030] Provide a semiconductor substrate (not labeled), form an implant region 100' in the semiconductor substrate, and form an active region 200' in the semiconductor substrate, and the gate 310' of the selection unit 300' vertically covers part of the active region 200', the extending direction of the gate 310' of the selection unit is the first direction. The gate 310' of the selection unit is formed with a second via hole 320' to electrically connect to the word line; the active region 200' is provided with a first via hole 330' near the gate 310' of the selection unit to electrically connect on the bit line. The two antifuse units are respectively the firs...
no. 3 example
[0033] Please also refer to Figure 6 , image 3 ; Figure 6 It is a schematic diagram of the antifuse one-time programmable memory in the third embodiment of the present invention; image 3 It is an equivalent circuit diagram of an antifuse one-time programmable memory in an embodiment of the present invention;
[0034] Provide a semiconductor substrate (not labeled), form an implant region 100' in the semiconductor substrate, and form an active region 200' in the semiconductor substrate, and the gate 310' of the selection unit 300' vertically covers part of the active region 200', the extending direction of the gate 310' of the selection unit is the first direction. The gate 310' of the selection unit is formed with a second via hole 320' to electrically connect to the word line; the active region 200' is provided with a first via hole 330' near the gate 310' of the selection unit to electrically connect on the bit line. The four antifuse units are respectively the firs...
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