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Anti-fuse one-time programmable memory and its realization method

An implementation method and anti-fuse technology, applied in read-only memory, static memory, information storage, etc., can solve the problems of large memory structure area and reliability improvement, and achieve the effect of reducing area and improving stability

Active Publication Date: 2020-06-02
GALAXYCORE SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

An anti-fuse unit is formed in another part of the active region, the anti-fuse unit includes a gate 410 of the anti-fuse unit and a via hole 420, and the via hole 420 is suitable for connecting a metal layer; the anti-fuse unit also includes a pass The hole 430 and the via hole 440 are connected to the metal layer; the existing antifuse one-time programmable memory has a large structure area, and the reliability needs to be improved

Method used

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  • Anti-fuse one-time programmable memory and its realization method
  • Anti-fuse one-time programmable memory and its realization method
  • Anti-fuse one-time programmable memory and its realization method

Examples

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no. 1 example

[0026] Please also refer to figure 2 , image 3 ; figure 2 It is a schematic diagram of the antifuse one-time programmable memory in the first embodiment of the present invention; image 3 It is an equivalent circuit diagram of an antifuse one-time programmable memory in an embodiment of the present invention;

[0027] Provide a semiconductor substrate (not labeled), form an implant region 100' in the semiconductor substrate, and form an active region 200' in the semiconductor substrate, and the gate 310' of the selection unit 300' vertically covers part of the active region 200', the extending direction of the gate 310' of the selection unit is the first direction. The gate 310' of the selection unit is formed with a second via hole 320' to electrically connect to the word line; the active region 200' is provided with a first via hole 330' near the gate 310' of the selection unit to electrically connect on the bit line. The two antifuse units are respectively the first...

no. 2 example

[0029] Please also refer to Figure 5 , image 3 ; Figure 5 It is a schematic diagram of the antifuse one-time programmable memory in the second embodiment of the present invention; image 3 It is an equivalent circuit diagram of an antifuse one-time programmable memory in an embodiment of the present invention;

[0030] Provide a semiconductor substrate (not labeled), form an implant region 100' in the semiconductor substrate, and form an active region 200' in the semiconductor substrate, and the gate 310' of the selection unit 300' vertically covers part of the active region 200', the extending direction of the gate 310' of the selection unit is the first direction. The gate 310' of the selection unit is formed with a second via hole 320' to electrically connect to the word line; the active region 200' is provided with a first via hole 330' near the gate 310' of the selection unit to electrically connect on the bit line. The two antifuse units are respectively the firs...

no. 3 example

[0033] Please also refer to Figure 6 , image 3 ; Figure 6 It is a schematic diagram of the antifuse one-time programmable memory in the third embodiment of the present invention; image 3 It is an equivalent circuit diagram of an antifuse one-time programmable memory in an embodiment of the present invention;

[0034] Provide a semiconductor substrate (not labeled), form an implant region 100' in the semiconductor substrate, and form an active region 200' in the semiconductor substrate, and the gate 310' of the selection unit 300' vertically covers part of the active region 200', the extending direction of the gate 310' of the selection unit is the first direction. The gate 310' of the selection unit is formed with a second via hole 320' to electrically connect to the word line; the active region 200' is provided with a first via hole 330' near the gate 310' of the selection unit to electrically connect on the bit line. The four antifuse units are respectively the firs...

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Abstract

The present invention provides an antifuse one-time programmable memory, comprising: a selection unit and at least two antifuse units, all located in and on the surface of a semiconductor substrate; the semiconductor substrate includes an active region, and the selection unit The gates of the at least two antifuse units cover part of the active area vertically; the gates of the at least two antifuse units respectively cover another part of the active area; the selection unit shares the same active area with the at least two antifuse units.

Description

technical field [0001] The invention relates to a memory and its operation method, in particular to an antifuse one-time programmable memory and its realization method. Background technique [0002] Non-volatile memory is a memory that can continue to save the data in the memory after the power is cut off, and can be divided into read-only memory (ROM), one-time programmable memory (OTP memory) and repeatable memory. Read and write memory. In addition, with the maturity of semiconductor memory technology, the non-volatile memory can be integrated into a manufacturing process compatible with complementary metal oxide semiconductor (CMOS) devices. [0003] For one-time programmable memory, it can be classified into fuse type and anti-fuse type. The fuse-type one-time programmable memory is a short circuit in an unprogrammed state, and an open circuit after programming. On the contrary, the anti-fuse type one-time programmable memory is an open circuit before programming, an...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/525H01L27/112H01L29/423G11C17/16G11C17/18
CPCH01L23/5252H01L29/42356G11C17/16G11C17/18H10B20/20
Inventor 陈晓亮俞大立黄泽
Owner GALAXYCORE SHANGHAI