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Semiconductor device and method for manufacturing same

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of accuracy impact, impact on device performance, unclear overlay pattern, etc., to reduce thickness and light transmittance. Enhanced, more accurate effects

Inactive Publication Date: 2016-06-01
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

[0004] In the manufacturing process of the device, when the first metal layer is made, the metal layer becomes thicker. Due to the poor light transmission of the metal layer, the overlay pattern of the front layer is not clear. When the photolithography of the metal layer is performed, The accuracy of the alignment with the front layer is affected, affecting the performance of the formed device

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  • Semiconductor device and method for manufacturing same
  • Semiconductor device and method for manufacturing same
  • Semiconductor device and method for manufacturing same

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Embodiment Construction

[0024] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0025] In the present invention, a method for manufacturing a semiconductor device is provided, comprising the steps of: providing a substrate; depositing an interlayer dielectric layer and a contact layer on the substrate, and performing planarization; selectively etching and removing a part of the thickness of the layer An intermediary layer; covering the first metal layer.

[0026] In the present invention, after depositing the interlayer dielectric layer and the contact layer and performing planarization, part of the thickness of the...

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Abstract

The invention provides a method for manufacturing a semiconductor device. The method comprises steps of: providing a substrate; depositing and planarizing an interlayer dielectric layer and a contact layer on the substrate; selectively etching and removing the interlayer dielectric layer with a certain thickness; and covering a first metallic layer. A step height difference is formed between the contact layer and the interlayer dielectric layer so that the thickness of the first metallic layer on the contact layer is reduced. Therefore, local transmittance is enhanced and aligning accuracy is increased when the first metallic layer is subjected to photoetching.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the current semiconductor manufacturing process, dozens of lithography processes are required. In the lithography process, the resolution of the lithography machine and the accuracy of alignment will affect the accuracy of the lithography process. [0003] Usually, an overlay pattern is formed on the non-device formation area, which is used as an alignment mark when the pattern of the lower layer is fabricated. [0004] In the manufacturing process of the device, when the first metal layer is made, the metal layer becomes thicker. Due to the poor light transmission of the metal layer, the overlay pattern of the front layer is not clear. When the photolithography of the metal layer is performed, The accuracy of the alignment to the front layer is affected, affecting the performan...

Claims

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Application Information

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IPC IPC(8): H01L21/3105
Inventor 唐波闫江王红丽许静唐兆云徐烨锋李春龙杨萌萌
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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