MOS transistor forming method

Abstract

The invention discloses an MOS transistor forming method, and the method comprises the steps: firstly carrying out the dry etching of active regions at two sides of a grid structure and forming bowl-shaped grooves; secondly corroding a semiconductor substrate through employing HF acid solution, and then corroding the bowl-shaped grooves through employing alkaline solution to form sigma grooves, wherein a modified region is formed on the surface of a shallow trench isolation structure playing a role in isolating the adjacent active regions at least before the HF acid solution corrodes the semiconductor substrate. Therefore, the modified region can avoid the corrosion of the shallow trench isolation structure when the HF acid solution corrodes the semiconductor substrate, thereby avoiding a condition that a material is still filled ion a conductor source-drain region formed at the placed of the corroded removed shallow trench isolation structure when a hold appears on the shallow trench isolation structure or a pressure stress material or a pull stress material is filled in the sigma grooves so as to form the source-drain region, finally improving the insulation of the shallow trench isolation structure, and avoiding mutual interference between the manufactured adjacent MOS transistors.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a MOS transistor. Background technique [0002] In the existing manufacturing process of semiconductor devices, since stress can change the energy gap and carrier mobility of silicon materials, it has become an increasingly common means to improve the performance of MOS transistors through stress. Specifically, a sigma-shaped groove is formed in the source / drain region of the transistor, and the tip of the sigma-shaped groove is used to apply compressive stress or tensile stress to the channel by controlling the filling of compressive stress or tensile stress material in it, thereby improving the channel performance. Mobility of carriers in the channel (electrons in NMOS transistors, holes in PMOS transistors). [0003] In the actual process, it is found that mutual interference of signals often occurs between adjacent MOS transistors man...

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Problems solved by technology

[0003] In the actual process, it is found that signal interference often occurs between adjacent MOS transistors fabricated above.

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